@@ -158,7 +158,9 @@ static int sdhc_litex_wait_for_dma(const struct device *dev, struct sdhc_command
158158 struct sdhc_litex_data * dev_data = dev -> data ;
159159 uint8_t data_event ;
160160
161- if (dev_data -> cmd23_not_supported && (data -> blocks > 1 )) {
161+ if (dev_data -> cmd23_not_supported && (data -> blocks > 1 ) &&
162+ ((cmd -> opcode == SD_READ_MULTIPLE_BLOCK ) ||
163+ (cmd -> opcode == SD_WRITE_MULTIPLE_BLOCK ))) {
162164 uint8_t response_len = SDCARD_CTRL_RESP_CRC ;
163165
164166 response_len |= (* transfer == SDCARD_CTRL_DATA_TRANSFER_READ )
@@ -198,31 +200,29 @@ static void sdhc_litex_prepare_dma(const struct device *dev, struct sdhc_command
198200 struct sdhc_data * data , uint8_t * transfer )
199201{
200202 const struct sdhc_litex_config * dev_config = dev -> config ;
203+ uint32_t dma_length = data -> block_size * data -> blocks ;
201204
202205 litex_write32 (data -> timeout_ms * (sys_clock_hw_cycles_per_sec () / MSEC_PER_SEC ),
203206 dev_config -> phy_datar_timeout_addr );
204207
205- switch (cmd -> opcode ) {
206- case SD_WRITE_SINGLE_BLOCK :
207- case SD_WRITE_MULTIPLE_BLOCK :
208+ if ((cmd -> opcode == SD_WRITE_SINGLE_BLOCK ) ||
209+ (cmd -> opcode == SD_WRITE_MULTIPLE_BLOCK ) ||
210+ ((cmd -> opcode == SDIO_RW_EXTENDED ) &&
211+ IS_BIT_SET (cmd -> arg , SDIO_CMD_ARG_RW_SHIFT ))) {
208212 * transfer = SDCARD_CTRL_DATA_TRANSFER_WRITE ;
209213 if (IS_ENABLED (CONFIG_SDHC_LITEX_LITESDCARD_NO_COHERENT_DMA )) {
210- sys_cache_data_flush_range (data -> data , data -> block_size * data -> blocks );
214+ sys_cache_data_flush_range (data -> data , dma_length );
211215 }
212216 litex_write8 (0 , dev_config -> mem2block_dma_enable_addr );
213217 litex_write64 ((uint64_t )(uintptr_t )(data -> data ),
214218 dev_config -> mem2block_dma_base_addr );
215- litex_write32 (data -> block_size * data -> blocks ,
216- dev_config -> mem2block_dma_length_addr );
217- break ;
218- default :
219+ litex_write32 (dma_length , dev_config -> mem2block_dma_length_addr );
220+ } else {
219221 * transfer = SDCARD_CTRL_DATA_TRANSFER_READ ;
220222 litex_write8 (0 , dev_config -> block2mem_dma_enable_addr );
221223 litex_write64 ((uint64_t )(uintptr_t )(data -> data ),
222224 dev_config -> block2mem_dma_base_addr );
223- litex_write32 (data -> block_size * data -> blocks ,
224- dev_config -> block2mem_dma_length_addr );
225- break ;
225+ litex_write32 (dma_length , dev_config -> block2mem_dma_length_addr );
226226 }
227227
228228 litex_write16 (data -> block_size , dev_config -> core_block_length_addr );
@@ -238,7 +238,9 @@ static void sdhc_litex_do_dma(const struct device *dev, struct sdhc_command *cmd
238238 LOG_DBG ("Setting up DMA for command: opcode=%d, arg=0x%08x, blocks=%d, block_size=%d" ,
239239 cmd -> opcode , cmd -> arg , data -> blocks , data -> block_size );
240240
241- if (!dev_data -> cmd23_not_supported && (data -> blocks > 1 )) {
241+ if (!dev_data -> cmd23_not_supported && (data -> blocks > 1 ) &&
242+ ((cmd -> opcode == SD_READ_MULTIPLE_BLOCK ) ||
243+ (cmd -> opcode == SD_WRITE_MULTIPLE_BLOCK ))) {
242244 litex_mmc_send_cmd (dev , SD_SET_BLOCK_COUNT , SDCARD_CTRL_DATA_TRANSFER_NONE ,
243245 data -> blocks , NULL ,
244246 SDCARD_CTRL_RESP_SHORT | SDCARD_CTRL_RESP_CRC );
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