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boards: arm: add Seeed XIAO BLE board
The Seeed XIAO BLE is a tiny (21 mm x 17.5 mm) Nordic Semiconductor nRF52840 ARM Cortex-M4F development board with onboard LEDs, USB port, QSPI flash, battery charger, and range of I/O broken out into 14 pins. Co-authored-by: Peter Johanson <peter@peterjohanson.com> Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
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‎boards/arm/xiao_ble/Kconfig‎

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# XIAO BLE board configuration
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# Copyright (c) 2022 Marcin Niestroj
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_XIAO_BLE
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config BOARD_ENABLE_DCDC
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bool "DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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config BOARD_ENABLE_DCDC_HV
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bool "High Voltage DCDC converter"
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select SOC_DCDC_NRF52X_HV
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default y
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endif # BOARD_XIAO_BLE

‎boards/arm/xiao_ble/Kconfig.board‎

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# XIAO BLE board configuration
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# Copyright (c) 2022 Marcin Niestroj
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_XIAO_BLE
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bool "XIAO BLE"
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depends on SOC_NRF52840_QIAA

‎boards/arm/xiao_ble/Kconfig.defconfig‎

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# XIAO BLE board configuration
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# Copyright (c) 2022 Marcin Niestroj
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_XIAO_BLE
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config BOARD
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default "xiao_ble"
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config BT_CTLR
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default BT
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endif # BOARD_XIAO_BLE
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if USB_DEVICE_STACK
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config UART_CONSOLE
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default CONSOLE
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config USB_DEVICE_INITIALIZE_AT_BOOT
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default y
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endif # USB_DEVICE_STACK

‎boards/arm/xiao_ble/board.cmake‎

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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(nrfjprog "--nrf-family=NRF52")
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board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000")
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board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000")
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include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

‎boards/arm/xiao_ble/doc/img/xiao_ble.png‎

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‎boards/arm/xiao_ble/doc/index.rst‎

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.. _xiao_ble:
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XIAO BLE
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########
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Overview
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********
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The Seeed XIAO BLE is a tiny (21 mm x 17.5 mm) Nordic Semiconductor nRF52840 ARM
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Cortex-M4F development board with onboard LEDs, USB port, QSPI flash, battery
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charger, and range of I/O broken out into 14 pins.
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.. figure:: img/xiao_ble.png
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:width: 300px
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:align: center
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:alt: XIAO BLE
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Hardware
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********
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- Nordic nRF52840 Cortex-M4F processor at 64MHz
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- 2MB QSPI Flash
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- RGB LED
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- USB Type-C Connector, nRF52840 acting as USB device
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- Battery charger BQ25101
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- Reset button
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- Bluetooth antenna
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Supported Features
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==================
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The xiao_ble board configuration supports the following hardware features:
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+-----------+------------+----------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+======================+
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| ADC | on-chip | adc |
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+-----------+------------+----------------------+
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| CLOCK | on-chip | clock_control |
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+-----------+------------+----------------------+
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| FLASH | on-chip | flash, QSPI flash |
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+-----------+------------+----------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+----------------------+
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| I2C(M) | on-chip | i2c |
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+-----------+------------+----------------------+
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| MPU | on-chip | arch/arm |
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+-----------+------------+----------------------+
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| NVIC | on-chip | arch/arm |
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+-----------+------------+----------------------+
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| PWM | on-chip | pwm |
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+-----------+------------+----------------------+
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| RADIO | on-chip | Bluetooth, |
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| | | ieee802154 |
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+-----------+------------+----------------------+
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| RTC | on-chip | system clock |
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+-----------+------------+----------------------+
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| SPI(M/S) | on-chip | spi |
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+-----------+------------+----------------------+
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| UART | on-chip | serial |
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+-----------+------------+----------------------+
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| USB | on-chip | usb |
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+-----------+------------+----------------------+
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| WDT | on-chip | watchdog |
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+-----------+------------+----------------------+
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Other hardware features have not been enabled yet for this board.
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Connections and IOs
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===================
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The `XIAO BLE wiki`_ has detailed information about the board including
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`pinouts`_ and the `schematic`_.
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LED
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---
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* LED1 (red) = P0.26
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* LED2 (green) = P0.30
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* LED3 (blue) = P0.06
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Programming and Debugging
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*************************
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The XIAO BLE ships with the `Adafruit nRF52 Bootloader`_ which supports flashing
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using `UF2`_. Doing so allows easy flashing of new images, but does not support
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debugging the device. For debugging please use `External Debugger`_.
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UF2 Flashing
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============
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To enter the bootloader, connect the USB port of the XIAO BLE to your host, and
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double tap the reset botton to the left of the USB connector. A mass storage
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device named `XIAO BLE` should appear on the host. Using the command line, or
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your file manager copy the `zephyr/zephyr.uf2` file from your build to the base
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of the `XIAO BLE` mass storage device. The XIAO BLE will automatically reset
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and launch the newly flashed application.
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External Debugger
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=================
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In order to support debugging the device, instead of using the bootloader, you
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can use an :ref:`External Debug Probe <debug-probes>`. To flash and debug Zephyr
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applications you need to use `Seeeduino XIAO Expansion Board`_ or solder an SWD
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header onto the back side of the board.
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For Segger J-Link debug probes, follow the instructions in the
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:ref:`jlink-external-debug-probe` page to install and configure all the
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necessary software.
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Flashing
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--------
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Follow the instructions in the :ref:`jlink-external-debug-probe` page to install
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and configure all the necessary software. Then build and flash applications as
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usual (see :ref:`build_an_application` and :ref:`application_run` for more
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details).
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Here is an example for the :ref:`hello_world` application.
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First, run your favorite terminal program to listen for output.
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.. code-block:: console
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$ minicom -D <tty_device> -b 115200
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Replace :code:`<tty_device>` with the port where the board XIAO BLE
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can be found. For example, under Linux, :code:`/dev/ttyACM0`.
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Then build and flash the application in the usual way. Just add
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``CONFIG_BOOT_DELAY=5000`` to the configuration, so that USB CDC ACM is
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initialized before any text is printed, as below:
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: xiao_ble
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:goals: build flash
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:gen-args: -DCONFIG_BOOT_DELAY=5000
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Debugging
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---------
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Refer to the :ref:`jlink-external-debug-probe` page to learn about debugging
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boards with a Segger IC.
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Testing the LEDs in the XIAO BLE
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********************************
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There is a sample that allows to test that LEDs on the board are working
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properly with Zephyr:
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.. zephyr-app-commands::
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:zephyr-app: samples/basic/blinky
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:board: xiao_ble
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:goals: build flash
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You can build and flash the examples to make sure Zephyr is running correctly on
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your board. The LED definitions can be found in
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:zephyr_file:`boards/arm/xiao_ble/xiao_ble.dts`.
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Testing shell over USB in the XIAO BLE
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**************************************
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There is a sample that allows to test shell interface over USB CDC ACM interface
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with Zephyr:
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.. zephyr-app-commands::
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:zephyr-app: samples/subsys/shell/shell_module
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:board: xiao_ble
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:goals: build flash
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References
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**********
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.. target-notes::
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.. _XIAO BLE wiki: https://wiki.seeedstudio.com/XIAO_BLE/
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.. _pinouts: https://wiki.seeedstudio.com/XIAO_BLE/#hardware-overview
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.. _schematic: https://wiki.seeedstudio.com/XIAO_BLE/#resources
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.. _Seeeduino XIAO Expansion Board: https://wiki.seeedstudio.com/Seeeduino-XIAO-Expansion-Board/
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.. _Adafruit nRF52 Bootloader: https://github.com/adafruit/Adafruit_nRF52_Bootloader
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.. _UF2: https://github.com/microsoft/uf2

‎boards/arm/xiao_ble/pre_dt_board.cmake‎

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# Copyright (c) 2022 Nordic Semiconductor
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# SPDX-License-Identifier: Apache-2.0
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# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
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# - power@40000000 & clock@40000000 & bprot@40000000
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# - acl@4001e000 & flash-controller@4001e000
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list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")

‎boards/arm/xiao_ble/seeed_xiao_connector.dtsi‎

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/*
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* Copyright (c) 2022 Peter Johanson
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* Copyright (c) 2022 Marcin Niestroj
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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xiao_d: connector {
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compatible = "seeed,xiao-gpio";
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#gpio-cells = <2>;
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gpio-map-mask = <0xffffffff 0xffffffc0>;
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gpio-map-pass-thru = <0 0x3f>;
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gpio-map
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= <0 0 &gpio0 2 0> /* D0 */
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, <1 0 &gpio0 3 0> /* D1 */
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, <2 0 &gpio0 28 0> /* D2 */
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, <3 0 &gpio0 29 0> /* D3 */
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, <4 0 &gpio0 4 0> /* D4 */
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, <5 0 &gpio0 5 0> /* D5 */
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, <6 0 &gpio1 11 0> /* D6 */
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, <7 0 &gpio1 12 0> /* D7 */
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, <8 0 &gpio1 13 0> /* D8 */
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, <9 0 &gpio1 14 0> /* D9 */
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, <10 0 &gpio1 15 0> /* D10 */
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;
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};
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};
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xiao_spi: &spi0 {};
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xiao_i2c: &i2c1 {};
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xiao_serial: &uart0 {};

‎boards/arm/xiao_ble/xiao_ble-pinctrl.dtsi‎

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/*
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* Copyright (c) 2022 Marcin Niestroj
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* SPDX-License-Identifier: Apache-2.0
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*/
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&pinctrl {
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uart0_default: uart0_default {
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group1 {
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psels = <NRF_PSEL(UART_TX, 1, 11)>;
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};
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group2 {
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psels = <NRF_PSEL(UART_RX, 1, 12)>;
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bias-pull-up;
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};
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};
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uart0_sleep: uart0_sleep {
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group1 {
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psels = <NRF_PSEL(UART_TX, 1, 11)>,
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<NRF_PSEL(UART_RX, 1, 12)>;
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low-power-enable;
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};
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};
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i2c1_default: i2c1_default {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 4)>,
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<NRF_PSEL(TWIM_SCL, 0, 5)>;
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};
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};
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i2c1_sleep: i2c1_sleep {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 4)>,
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<NRF_PSEL(TWIM_SCL, 0, 5)>;
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low-power-enable;
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};
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};
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pwm0_default: pwm0_default {
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group1 {
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psels = <NRF_PSEL(PWM_OUT0, 0, 17)>;
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nordic,invert;
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};
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};
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pwm0_sleep: pwm0_sleep {
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group1 {
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psels = <NRF_PSEL(PWM_OUT0, 0, 17)>;
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low-power-enable;
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};
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};
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spi0_default: spi0_default {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 1, 13)>,
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<NRF_PSEL(SPIM_MOSI, 1, 15)>,
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<NRF_PSEL(SPIM_MISO, 1, 14)>;
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};
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};
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spi0_sleep: spi0_sleep {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 1, 13)>,
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<NRF_PSEL(SPIM_MOSI, 1, 15)>,
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<NRF_PSEL(SPIM_MISO, 1, 14)>;
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low-power-enable;
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};
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};
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spi3_default: spi3_default {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 0, 21)>,
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<NRF_PSEL(SPIM_MOSI, 0, 20)>,
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<NRF_PSEL(SPIM_MISO, 0, 24)>;
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};
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};
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spi3_sleep: spi3_sleep {
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group1 {
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psels = <NRF_PSEL(SPIM_SCK, 0, 21)>,
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<NRF_PSEL(SPIM_MOSI, 0, 20)>,
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<NRF_PSEL(SPIM_MISO, 0, 24)>;
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low-power-enable;
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};
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};
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qspi_default: qspi_default {
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group1 {
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psels = <NRF_PSEL(QSPI_SCK, 0, 21)>,
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<NRF_PSEL(QSPI_IO0, 0, 20)>,
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<NRF_PSEL(QSPI_IO1, 0, 24)>,
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<NRF_PSEL(QSPI_IO2, 0, 22)>,
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<NRF_PSEL(QSPI_IO3, 0, 23)>,
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<NRF_PSEL(QSPI_CSN, 0, 25)>;
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};
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};
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qspi_sleep: qspi_sleep {
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group1 {
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psels = <NRF_PSEL(QSPI_SCK, 0, 21)>,
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<NRF_PSEL(QSPI_IO0, 0, 20)>,
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<NRF_PSEL(QSPI_IO1, 0, 24)>,
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<NRF_PSEL(QSPI_IO2, 0, 22)>,
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<NRF_PSEL(QSPI_IO3, 0, 23)>,
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<NRF_PSEL(QSPI_CSN, 0, 25)>;
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low-power-enable;
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};
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};
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};

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