dts: arm: st: l4: Move timers7 node

TIM7 peripheral was defined for all STM32L4 chips
in the device tree when not every chip supports it.
This commit moves the node so that only chips
which support the peripheral have the node defined.

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>

Author: gudnimg

dts/arm/st/l4/stm32l4.dtsi

@@ -254,24 +254,6 @@
 			};
 		};
 
-		timers7: timers@40001400 {
-			compatible = "st,stm32-timers";
-			reg = <0x40001400 0x400>;
-			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000020>;
-			interrupts = <55 0>;
-			interrupt-names = "global";
-			status = "disabled";
-			label = "TIMERS_7";
-
-			pwm {
-				compatible = "st,stm32-pwm";
-				status = "disabled";
-				st,prescaler = <10000>;
-				label = "PWM_7";
-				#pwm-cells = <3>;
-			};
-		};
-
 		timers15: timers@40014000 {
 			compatible = "st,stm32-timers";
 			reg = <0x40014000 0x400>;

dts/arm/st/l4/stm32l432.dtsi

@@ -19,6 +19,24 @@
 			label = "SPI_3";
 		};
 
+		timers7: timers@40001400 {
+			compatible = "st,stm32-timers";
+			reg = <0x40001400 0x400>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000020>;
+			interrupts = <55 0>;
+			interrupt-names = "global";
+			status = "disabled";
+			label = "TIMERS_7";
+
+			pwm {
+				compatible = "st,stm32-pwm";
+				status = "disabled";
+				st,prescaler = <10000>;
+				label = "PWM_7";
+				#pwm-cells = <3>;
+			};
+		};
+
 		can1: can@40006400 {
 			compatible = "st,stm32-can";
 			#address-cells = <1>;

dts/arm/st/l4/stm32l471.dtsi

@@ -163,6 +163,24 @@
 			};
 		};
 
+		timers7: timers@40001400 {
+			compatible = "st,stm32-timers";
+			reg = <0x40001400 0x400>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000020>;
+			interrupts = <55 0>;
+			interrupt-names = "global";
+			status = "disabled";
+			label = "TIMERS_7";
+
+			pwm {
+				compatible = "st,stm32-pwm";
+				status = "disabled";
+				st,prescaler = <10000>;
+				label = "PWM_7";
+				#pwm-cells = <3>;
+			};
+		};
+
 		timers8: timers@40013400 {
 			compatible = "st,stm32-timers";
 			reg = <0x40013400 0x400>;

dts/arm/st/l4/stm32l4r5.dtsi

@@ -186,6 +186,24 @@
 			};
 		};
 
+		timers7: timers@40001400 {
+			compatible = "st,stm32-timers";
+			reg = <0x40001400 0x400>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000020>;
+			interrupts = <55 0>;
+			interrupt-names = "global";
+			status = "disabled";
+			label = "TIMERS_7";
+
+			pwm {
+				compatible = "st,stm32-pwm";
+				status = "disabled";
+				st,prescaler = <10000>;
+				label = "PWM_7";
+				#pwm-cells = <3>;
+			};
+		};
+
 		timers8: timers@40013400 {
 			compatible = "st,stm32-timers";
 			reg = <0x40013400 0x400>;