This work presents an ESL design methodology enabling a unified system to implementation flow for high performance digital signal processing hardware. It is based on the creation and reuse of a single high level abstraction model in untimed C/C++ which is used within the system level environment for defining the executable specification and passed through high level synthesis for hardware creation. This methodology enables design space exploration both at the algorithmic and architectural level to achieve optimal Power, Performance and Area results with 5-10X productivity gain. We demonstrate this methodology through the design of a High Performance Frequency Domain Processor.