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| author | Han Gao <gaohan@iscas.ac.cn> | 2026-04-01 01:12:47 +0800 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2026-06-23 12:24:17 -0500 |
| commit | c6d51515ee0b79a52b7e532b6b20067fa0cec96f (patch) | |
| tree | 42aaad6560f2dabe0f541d1259062388a990c5c3 /Documentation | |
| parent | 254f49634ee16a731174d2ae34bc50bd5f45e731 (diff) | |
| download | ath-c6d51515ee0b79a52b7e532b6b20067fa0cec96f.tar.gz | |
dt-bindings: PCI: sophgo: Add dma-coherent property for SG2042
Add dma-coherent as an allowed property in the SG2042 PCIe host controller
binding. SG2042's PCIe Root Complexes are cache-coherent with the CPU.
Signed-off-by: Han Gao <gaohan@iscas.ac.cn>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20260331171248.973014-2-gaohan@iscas.ac.cn
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/pci/sophgo,sg2042-pcie-host.yaml | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/sophgo,sg2042-pcie-host.yaml b/Documentation/devicetree/bindings/pci/sophgo,sg2042-pcie-host.yaml index f8b7ca57fff14..ab482488b0475 100644 --- a/Documentation/devicetree/bindings/pci/sophgo,sg2042-pcie-host.yaml +++ b/Documentation/devicetree/bindings/pci/sophgo,sg2042-pcie-host.yaml @@ -30,6 +30,8 @@ properties: device-id: const: 0x2042 + dma-coherent: true + msi-parent: true allOf: @@ -60,5 +62,6 @@ examples: vendor-id = <0x1f1c>; device-id = <0x2042>; cdns,no-bar-match-nbits = <48>; + dma-coherent; msi-parent = <&msi>; }; |