aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
authorWill Deacon <will@kernel.org>2026-06-14 12:17:07 +0100
committerWill Deacon <will@kernel.org>2026-06-14 12:17:07 +0100
commit917578e25d7585e8f55a48643ad3c2711290cdbc (patch)
tree0976e7895732c022bdf1df544f9ef8c76a3cced7 /arch
parent35d2b77d8dd76cfccf54cc0c6453584ea4f31224 (diff)
parent11c33ffb3a4e65e775e9bd814eb71df06ea7c847 (diff)
downloadath-917578e25d7585e8f55a48643ad3c2711290cdbc.tar.gz
Merge branch 'for-next/misc' into for-next/core
* for-next/misc: arm64: arch_timer: reuse arch_timer_read_cnt{p,v}ct_el0() helpers arm64: patching: replace min_t with min in __text_poke ARM64: remove unnecessary architecture-specific <asm/device.h> arm64: Implement _THIS_IP_ using inline asm arm64: panic from init_IRQ if IRQ handler stacks cannot be allocated arm64: smp: Do not mark secondary CPUs possible under nosmp arm64/daifflags: Make local_daif_*() helpers __always_inline
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/include/asm/arch_timer.h12
-rw-r--r--arch/arm64/include/asm/daifflags.h10
-rw-r--r--arch/arm64/include/asm/device.h14
-rw-r--r--arch/arm64/include/asm/linkage.h2
-rw-r--r--arch/arm64/kernel/irq.c29
-rw-r--r--arch/arm64/kernel/patching.c3
-rw-r--r--arch/arm64/kernel/smp.c14
7 files changed, 40 insertions, 44 deletions
diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
index f5794d50f51dc..6717209df05ba 100644
--- a/arch/arm64/include/asm/arch_timer.h
+++ b/arch/arm64/include/asm/arch_timer.h
@@ -178,12 +178,8 @@ static __always_inline u64 __arch_counter_get_cntpct_stable(void)
static __always_inline u64 __arch_counter_get_cntpct(void)
{
- u64 cnt;
+ u64 cnt = arch_timer_read_cntpct_el0();
- asm volatile(ALTERNATIVE("isb\n mrs %0, cntpct_el0",
- "nop\n" __mrs_s("%0", SYS_CNTPCTSS_EL0),
- ARM64_HAS_ECV)
- : "=r" (cnt));
arch_counter_enforce_ordering(cnt);
return cnt;
}
@@ -199,12 +195,8 @@ static __always_inline u64 __arch_counter_get_cntvct_stable(void)
static __always_inline u64 __arch_counter_get_cntvct(void)
{
- u64 cnt;
+ u64 cnt = arch_timer_read_cntvct_el0();
- asm volatile(ALTERNATIVE("isb\n mrs %0, cntvct_el0",
- "nop\n" __mrs_s("%0", SYS_CNTVCTSS_EL0),
- ARM64_HAS_ECV)
- : "=r" (cnt));
arch_counter_enforce_ordering(cnt);
return cnt;
}
diff --git a/arch/arm64/include/asm/daifflags.h b/arch/arm64/include/asm/daifflags.h
index 5fca480090434..795b351284673 100644
--- a/arch/arm64/include/asm/daifflags.h
+++ b/arch/arm64/include/asm/daifflags.h
@@ -19,7 +19,7 @@
/* mask/save/unmask/restore all exceptions, including interrupts. */
-static inline void local_daif_mask(void)
+static __always_inline void local_daif_mask(void)
{
WARN_ON(system_has_prio_mask_debugging() &&
(read_sysreg_s(SYS_ICC_PMR_EL1) == (GIC_PRIO_IRQOFF |
@@ -38,7 +38,7 @@ static inline void local_daif_mask(void)
trace_hardirqs_off();
}
-static inline unsigned long local_daif_save_flags(void)
+static __always_inline unsigned long local_daif_save_flags(void)
{
unsigned long flags;
@@ -53,7 +53,7 @@ static inline unsigned long local_daif_save_flags(void)
return flags;
}
-static inline unsigned long local_daif_save(void)
+static __always_inline unsigned long local_daif_save(void)
{
unsigned long flags;
@@ -64,7 +64,7 @@ static inline unsigned long local_daif_save(void)
return flags;
}
-static inline void local_daif_restore(unsigned long flags)
+static __always_inline void local_daif_restore(unsigned long flags)
{
bool irq_disabled = flags & PSR_I_BIT;
@@ -124,7 +124,7 @@ static inline void local_daif_restore(unsigned long flags)
* Called by synchronous exception handlers to restore the DAIF bits that were
* modified by taking an exception.
*/
-static inline void local_daif_inherit(struct pt_regs *regs)
+static __always_inline void local_daif_inherit(struct pt_regs *regs)
{
unsigned long flags = regs->pstate & DAIF_MASK;
diff --git a/arch/arm64/include/asm/device.h b/arch/arm64/include/asm/device.h
deleted file mode 100644
index 9964987513183..0000000000000
--- a/arch/arm64/include/asm/device.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (C) 2012 ARM Ltd.
- */
-#ifndef __ASM_DEVICE_H
-#define __ASM_DEVICE_H
-
-struct dev_archdata {
-};
-
-struct pdev_archdata {
-};
-
-#endif
diff --git a/arch/arm64/include/asm/linkage.h b/arch/arm64/include/asm/linkage.h
index 40bd17add5397..73eabc82a6bb2 100644
--- a/arch/arm64/include/asm/linkage.h
+++ b/arch/arm64/include/asm/linkage.h
@@ -43,4 +43,6 @@
SYM_TYPED_START(name, SYM_L_GLOBAL, SYM_A_ALIGN) \
bti c ;
+#define _THIS_IP_ ({ unsigned long __ip; asm volatile("adr %0, ." : "=r" (__ip)); __ip; })
+
#endif
diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c
index 15dedb385b9e4..9fafd826002b7 100644
--- a/arch/arm64/kernel/irq.c
+++ b/arch/arm64/kernel/irq.c
@@ -10,6 +10,7 @@
* Copyright (C) 2012 ARM Ltd.
*/
+#include <linux/errno.h>
#include <linux/hardirq.h>
#include <linux/init.h>
#include <linux/irq.h>
@@ -32,34 +33,43 @@ DEFINE_PER_CPU(struct nmi_ctx, nmi_contexts);
DEFINE_PER_CPU(unsigned long *, irq_stack_ptr);
-
DECLARE_PER_CPU(unsigned long *, irq_shadow_call_stack_ptr);
#ifdef CONFIG_SHADOW_CALL_STACK
DEFINE_PER_CPU(unsigned long *, irq_shadow_call_stack_ptr);
#endif
-static void init_irq_scs(void)
+static int __init init_irq_scs(void)
{
int cpu;
+ void *s;
if (!scs_is_enabled())
- return;
+ return 0;
+
+ for_each_possible_cpu(cpu) {
+ s = scs_alloc(early_cpu_to_node(cpu));
+ if (!s)
+ return -ENOMEM;
+ per_cpu(irq_shadow_call_stack_ptr, cpu) = s;
+ }
- for_each_possible_cpu(cpu)
- per_cpu(irq_shadow_call_stack_ptr, cpu) =
- scs_alloc(early_cpu_to_node(cpu));
+ return 0;
}
-static void __init init_irq_stacks(void)
+static int __init init_irq_stacks(void)
{
int cpu;
unsigned long *p;
for_each_possible_cpu(cpu) {
p = arch_alloc_vmap_stack(IRQ_STACK_SIZE, early_cpu_to_node(cpu));
+ if (!p)
+ return -ENOMEM;
per_cpu(irq_stack_ptr, cpu) = p;
}
+
+ return 0;
}
#ifdef CONFIG_SOFTIRQ_ON_OWN_STACK
@@ -109,8 +119,9 @@ int __init set_handle_fiq(void (*handle_fiq)(struct pt_regs *))
void __init init_IRQ(void)
{
- init_irq_stacks();
- init_irq_scs();
+ if (init_irq_stacks() || init_irq_scs())
+ panic("Failed to allocate IRQ stack resources\n");
+
irqchip_init();
if (system_uses_irq_prio_masking()) {
diff --git a/arch/arm64/kernel/patching.c b/arch/arm64/kernel/patching.c
index 1041bc67a3eee..09f019c6547a0 100644
--- a/arch/arm64/kernel/patching.c
+++ b/arch/arm64/kernel/patching.c
@@ -116,8 +116,7 @@ static void *__text_poke(text_poke_f func, void *addr, void *src, size_t len)
while (patched < len) {
ptr = addr + patched;
- size = min_t(size_t, PAGE_SIZE - offset_in_page(ptr),
- len - patched);
+ size = min(PAGE_SIZE - offset_in_page(ptr), len - patched);
waddr = patch_map(ptr, FIX_TEXT_POKE0);
func(waddr, src, patched, size);
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 1aa324104afb4..1b63846f646a4 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -745,16 +745,22 @@ void __init smp_init_cpus(void)
else
acpi_parse_and_init_cpus();
- if (cpu_count > nr_cpu_ids)
- pr_warn("Number of cores (%d) exceeds configured maximum of %u - clipping\n",
- cpu_count, nr_cpu_ids);
-
if (!bootcpu_valid) {
pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
return;
}
/*
+ * For the nosmp/maxcpus=0 case, do not mark the secondary CPUs
+ * possible.
+ */
+ if (!setup_max_cpus)
+ return;
+
+ if (cpu_count > nr_cpu_ids)
+ pr_warn("Number of cores (%d) exceeds configured maximum of %u - clipping\n",
+ cpu_count, nr_cpu_ids);
+ /*
* We need to set the cpu_logical_map entries before enabling
* the cpus so that cpu processor description entries (DT cpu nodes
* and ACPI MADT entries) can be retrieved by matching the cpu hwid
generated by cgit 1.3-korg (git 2.53.0) at 2026-07-01 13:50:17 +0000