diff options
| author | Hans Zhang <18255117159@163.com> | 2026-05-18 08:42:45 +0800 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2026-06-23 14:36:33 -0500 |
| commit | d24e3fab6ee23c2d7076b0e5ffe5c7210cc9dae3 (patch) | |
| tree | 7b811100a174a9e2ca96f79572cbdf7c751fda8c /drivers | |
| parent | 6bba1de54cebcded567563311710f9b3111e2652 (diff) | |
| download | ath-d24e3fab6ee23c2d7076b0e5ffe5c7210cc9dae3.tar.gz | |
PCI: mediatek-gen3: Add 100 ms delay after link up
The MediaTek Gen3 PCIe host driver lacks the required 100 ms delay after
link training completes for speeds > 5.0 GT/s, as specified in PCIe r6.0
sec 6.6.1.
The driver already stores max_link_speed (from the device tree). After
mtk_pcie_startup_port() successfully brings up the link, call
pci_host_common_link_train_delay() to comply with the specification.
Signed-off-by: Hans Zhang <18255117159@163.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patch.msgid.link/20260518004246.1384532-7-18255117159@163.com
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pci/controller/pcie-mediatek-gen3.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c index b0accd8285892..5abddec4e9bec 100644 --- a/drivers/pci/controller/pcie-mediatek-gen3.c +++ b/drivers/pci/controller/pcie-mediatek-gen3.c @@ -30,6 +30,7 @@ #include <linux/regmap.h> #include <linux/reset.h> +#include "pci-host-common.h" #include "../pci.h" #define PCIE_BASE_CFG_REG 0x14 @@ -570,6 +571,8 @@ static int mtk_pcie_startup_port(struct mtk_gen3_pcie *pcie) goto err_power_down_device; } + pci_host_common_link_train_delay(pcie->max_link_speed); + return 0; err_power_down_device: |