| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2026-02-21 | Convert 'alloc_obj' family to use the new default GFP_KERNEL argument | Linus Torvalds | 1 | -1/+1 |
| 2026-02-21 | treewide: Replace kmalloc with kmalloc_obj for non-scalar types | Kees Cook | 1 | -1/+1 |
| 2026-01-06 | clk: meson: gxbb: use the existing HHI_HDMI_PLL_CNTL3 macro | Martin Blumenstingl | 1 | -3/+3 |
| 2026-01-06 | clk: meson: g12a: Limit the HDMI PLL OD to /4 | Martin Blumenstingl | 1 | -3/+14 |
| 2026-01-06 | clk: meson: gxbb: Limit the HDMI PLL OD to /4 on GXL/GXM SoCs | Martin Blumenstingl | 1 | -3/+14 |
| 2025-12-15 | clk: amlogic: remove potentially unsafe flags from S4 video clocks | Chuan Liu | 1 | -4/+0 |
| 2025-12-15 | clk: amlogic: add video-related clocks for S4 SoC | Chuan Liu | 1 | -0/+202 |
| 2025-12-15 | clk: meson: t7: add t7 clock peripherals controller driver | Jian Hu | 3 | -0/+1285 |
| 2025-12-15 | clk: meson: t7: add support for the T7 SoC PLL clock | Jian Hu | 3 | -0/+1090 |
| 2025-09-19 | clk: amlogic: fix recent code refactoring | Marek Szyprowski | 1 | -1/+1 |
| 2025-09-04 | clk: amlogic: c3-peripherals: use helper for basic composite clocks | Jerome Brunet | 1 | -966/+63 |
| 2025-09-04 | clk: amlogic: align s4 and c3 pwm clock descriptions | Jerome Brunet | 2 | -596/+90 |
| 2025-09-04 | clk: amlogic: add composite clock helpers | Jerome Brunet | 1 | -0/+57 |
| 2025-09-04 | clk: amlogic: use the common pclk definition | Jerome Brunet | 4 | -101/+51 |
| 2025-09-04 | clk: amlogic: introduce a common pclk definition | Jerome Brunet | 7 | -31/+52 |
| 2025-09-04 | clk: amlogic: pclk explicitly use CLK_IGNORE_UNUSED | Jerome Brunet | 10 | -444/+504 |
| 2025-09-04 | clk: amlogic: drop CLK_SET_RATE_PARENT from peripheral clocks | Jerome Brunet | 1 | -1/+1 |
| 2025-09-04 | clk: amlogic: move PCLK definition to clkc-utils | Jerome Brunet | 2 | -20/+21 |
| 2025-09-04 | clk: amlogic: aoclk: use clkc-utils syscon probe | Jerome Brunet | 5 | -31/+33 |
| 2025-09-04 | clk: amlogic: use probe helper in mmio based controllers | Jerome Brunet | 7 | -301/+63 |
| 2025-09-04 | clk: amlogic: add probe helper for mmio based controllers | Jerome Brunet | 2 | -13/+50 |
| 2025-09-04 | clk: amlogic: drop meson-clkcee | Jerome Brunet | 9 | -115/+85 |
| 2025-08-25 | clk: amlogic: naming consistency alignment | Jerome Brunet | 14 | -3586/+3529 |
| 2025-07-29 | Merge branches 'clk-renesas', 'clk-samsung', 'clk-spacemit', 'clk-allwinner' ... | Stephen Boyd | 39 | -3082/+639 |
| 2025-07-26 | clk: Fix typos | Bjorn Helgaas | 3 | -5/+5 |
| 2025-07-02 | clk: amlogic: s4: remove unused data | Jerome Brunet | 1 | -112/+0 |
| 2025-07-02 | clk: amlogic: drop clk_regmap tables | Jerome Brunet | 19 | -2191/+5 |
| 2025-07-02 | clk: amlogic: get regmap with clk_regmap_init | Jerome Brunet | 11 | -0/+89 |
| 2025-06-30 | clk: amlogic: remove unnecessary headers | Jerome Brunet | 18 | -677/+530 |
| 2025-06-23 | clk: amlogic: axg-audio: use the auxiliary reset driver | Jerome Brunet | 2 | -102/+15 |
| 2025-05-15 | clk: meson: Do not enable by default during compile testing | Krzysztof Kozlowski | 1 | -8/+8 |
| 2025-05-15 | clk: meson-g12a: add missing fclk_div2 to spicc | Da Xue | 1 | -0/+1 |
| 2025-03-14 | clk: amlogic: a1: fix a typo | Jian Hu | 1 | -1/+1 |
| 2025-03-14 | clk: amlogic: gxbb: drop non existing 32k clock parent | Jerome Brunet | 1 | -6/+6 |
| 2025-03-14 | clk: amlogic: gxbb: drop incorrect flag on 32k clock | Jerome Brunet | 1 | -1/+1 |
| 2025-03-14 | clk: amlogic: g12b: fix cluster A parent data | Jerome Brunet | 1 | -12/+24 |
| 2025-03-14 | clk: amlogic: g12a: fix mmc A peripheral clock | Jerome Brunet | 1 | -1/+1 |
| 2024-12-10 | Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/... | Linus Torvalds | 2 | -10/+101 |
| 2024-12-02 | clk: amlogic: axg-audio: revert reset implementation | Jerome Brunet | 2 | -10/+101 |
| 2024-12-02 | module: Convert symbol namespace to string literal | Peter Zijlstra | 25 | -49/+49 |
| 2024-11-14 | clk: amlogic: axg-audio: fix Kconfig dependency on RESET_MESON_AUX | Arnd Bergmann | 1 | -1/+1 |
| 2024-10-14 | clk: amlogic: axg-audio: use the auxiliary reset driver | Jerome Brunet | 2 | -100/+10 |
| 2024-09-30 | clk: meson: meson8b: remove spinlock | Jerome Brunet | 1 | -7/+0 |
| 2024-09-30 | clk: meson: mpll: Delete a useless spinlock from the MPLL | Chuan Liu | 7 | -39/+0 |
| 2024-09-30 | clk: meson: s4: pll: fix frac maximum value for hifi_pll | Chuan Liu | 1 | -0/+1 |
| 2024-09-30 | clk: meson: c3: pll: fix frac maximum value for hifi_pll | Chuan Liu | 1 | -0/+1 |
| 2024-09-30 | clk: meson: Support PLL with fixed fractional denominators | Chuan Liu | 2 | -3/+6 |
| 2024-09-30 | clk: meson: s4: pll: hifi_pll support fractional multiplier | Chuan Liu | 1 | -1/+5 |
| 2024-07-29 | clk: meson: introduce symbol namespace for amlogic clocks | Jerome Brunet | 25 | -25/+49 |
| 2024-07-29 | clk: meson: axg-audio: add sm1 earcrx clocks | Jerome Brunet | 2 | -1/+33 |
| 2024-07-29 | clk: meson: axg-audio: setup regmap max_register based on the SoC | Jerome Brunet | 1 | -2/+6 |
| 2024-07-10 | clk: meson: s4: pll: Constify struct regmap_config | Javier Carrasco | 1 | -1/+1 |
| 2024-07-10 | clk: meson: s4: peripherals: Constify struct regmap_config | Javier Carrasco | 1 | -1/+1 |
| 2024-07-10 | clk: meson: c3: pll: Constify struct regmap_config | Javier Carrasco | 1 | -1/+1 |
| 2024-07-10 | clk: meson: c3: peripherals: Constify struct regmap_config | Javier Carrasco | 1 | -1/+1 |
| 2024-07-10 | clk: meson: a1: pll: Constify struct regmap_config | Javier Carrasco | 1 | -1/+1 |
| 2024-07-10 | clk: meson: a1: peripherals: Constify struct regmap_config | Javier Carrasco | 1 | -1/+1 |
| 2024-06-14 | clk: meson: add missing MODULE_DESCRIPTION() macros | Jerome Brunet | 15 | -11/+29 |
| 2024-06-10 | clk: meson: add 'NOINIT_ENABLED' flag to eliminate init for enabled PLL | Dmitry Rokosov | 2 | -16/+25 |
| 2024-06-04 | clk: meson: c3: add c3 clock peripherals controller driver | Xianwei Zhao | 3 | -0/+2380 |
| 2024-06-04 | clk: meson: c3: add support for the C3 SoC PLL clock | Xianwei Zhao | 3 | -0/+760 |
| 2024-06-03 | clk: meson: s4: fix pwm_j_div parent clock | Xianwei Zhao | 1 | -1/+1 |
| 2024-06-03 | clk: meson: s4: fix fixed_pll_dco clock | Xianwei Zhao | 1 | -0/+5 |
| 2024-05-03 | clk: meson: s4: fix module autoloading | Krzysztof Kozlowski | 2 | -0/+2 |
| 2024-04-10 | clk: meson: fix module license to GPL only | Neil Armstrong | 18 | -18/+18 |
| 2024-04-10 | clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF | Neil Armstrong | 2 | -20/+57 |
| 2024-04-10 | clk: meson: add vclk driver | Neil Armstrong | 4 | -0/+197 |
| 2024-03-29 | clk: meson: pll: print out pll name when unable to lock it | Dmitry Rokosov | 1 | -2/+2 |
| 2024-03-29 | clk: meson: s4: pll: determine maximum register in regmap config | Dmitry Rokosov | 1 | -0/+1 |
| 2024-03-29 | clk: meson: s4: peripherals: determine maximum register in regmap config | Dmitry Rokosov | 1 | -0/+1 |
| 2024-03-29 | clk: meson: a1: pll: determine maximum register in regmap config | Dmitry Rokosov | 1 | -0/+1 |
| 2024-03-29 | clk: meson: a1: peripherals: determine maximum register in regmap config | Dmitry Rokosov | 1 | -0/+1 |
| 2024-02-05 | clk: meson: Add missing clocks to axg_clk_regmaps | Igor Prusov | 1 | -0/+2 |
| 2023-11-24 | clk: meson: g12a: add CSI & ISP gates clocks | Neil Armstrong | 1 | -0/+9 |
| 2023-11-24 | clk: meson: g12a: add MIPI ISP clocks | Neil Armstrong | 2 | -0/+67 |
| 2023-11-24 | clk: meson: g12a: add CTS_ENCL & CTS_ENCL_SEL clocks | Neil Armstrong | 1 | -0/+40 |
| 2023-10-23 | clk: meson: S4: select CONFIG_COMMON_CLK_MESON_CLKC_UTILS | Arnd Bergmann | 1 | -0/+2 |
| 2023-09-27 | clk: meson: S4: add support for Amlogic S4 SoC peripheral clock controller | Yu Tu | 4 | -0/+3881 |
| 2023-09-27 | clk: meson: S4: add support for Amlogic S4 SoC PLL clock driver | Yu Tu | 4 | -0/+918 |
| 2023-08-30 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 28 | -3277/+2717 |
| 2023-08-30 | Merge branches 'clk-versa', 'clk-strdup', 'clk-amlogic', 'clk-allwinner' and ... | Stephen Boyd | 28 | -3269/+2709 |
| 2023-08-08 | clk: meson: axg-audio: move bindings include to main driver | Neil Armstrong | 2 | -3/+2 |
| 2023-08-08 | clk: meson: meson8b: move bindings include to main driver | Neil Armstrong | 2 | -7/+3 |
| 2023-08-08 | clk: meson: a1: move bindings include to main driver | Neil Armstrong | 4 | -6/+4 |
| 2023-08-08 | clk: meson: eeclk: move bindings include to main driver | Neil Armstrong | 6 | -9/+6 |
| 2023-08-08 | clk: meson: aoclk: move bindings include to main driver | Neil Armstrong | 6 | -45/+9 |
| 2023-08-08 | dt-bindings: clk: axg-audio-clkc: expose all clock ids | Neil Armstrong | 1 | -70/+0 |
| 2023-08-08 | dt-bindings: clk: amlogic,a1-pll-clkc: expose all clock ids | Neil Armstrong | 1 | -15/+0 |
| 2023-08-08 | dt-bindings: clk: amlogic,a1-peripherals-clkc: expose all clock ids | Neil Armstrong | 1 | -63/+0 |
| 2023-08-08 | dt-bindings: clk: meson8b-clkc: expose all clock ids | Neil Armstrong | 1 | -108/+0 |
| 2023-08-08 | dt-bindings: clk: g12a-aoclkc: expose all clock ids | Neil Armstrong | 1 | -17/+0 |
| 2023-08-08 | dt-bindings: clk: g12a-clks: expose all clock ids | Neil Armstrong | 1 | -140/+0 |
| 2023-08-08 | dt-bindings: clk: axg-clkc: expose all clock ids | Neil Armstrong | 1 | -58/+0 |
| 2023-08-08 | dt-bindings: clk: gxbb-clkc: expose all clock ids | Neil Armstrong | 1 | -76/+0 |
| 2023-08-08 | clk: meson: migrate axg-audio out of hw_onecell_data to drop NR_CLKS | Neil Armstrong | 3 | -428/+424 |
| 2023-08-08 | clk: meson: migrate meson8b out of hw_onecell_data to drop NR_CLKS | Neil Armstrong | 3 | -654/+656 |
| 2023-08-08 | clk: meson: migrate a1 clock drivers out of hw_onecell_data to drop NR_CLKS | Neil Armstrong | 5 | -180/+183 |
| 2023-08-08 | clk: meson: migrate meson-aoclk out of hw_onecell_data to drop NR_CLKS | Neil Armstrong | 9 | -73/+68 |
| 2023-08-08 | clk: meson: migrate meson-eeclk out of hw_onecell_data to drop NR_CLKS | Neil Armstrong | 9 | -1317/+1306 |
| 2023-08-08 | clk: meson: introduce meson-clkc-utils | Neil Armstrong | 4 | -0/+48 |
| 2023-07-19 | clk: Explicitly include correct DT includes | Rob Herring | 8 | -8/+8 |
| 2023-07-11 | clk: meson: change usleep_range() to udelay() for atomic context | Dmitry Rokosov | 1 | -2/+2 |
| 2023-06-15 | clk: meson: pll: remove unneeded semicolon | Jiapeng Chong | 1 | -1/+1 |
| 2023-06-12 | clk: meson: a1: Staticize rtc clk | Stephen Boyd | 1 | -1/+1 |
| 2023-05-30 | clk: meson: a1: add Amlogic A1 Peripherals clock controller driver | Dmitry Rokosov | 4 | -0/+2367 |
| 2023-05-30 | clk: meson: a1: add Amlogic A1 PLL clock controller driver | Dmitry Rokosov | 4 | -0/+414 |
| 2023-05-30 | clk: meson: introduce new pll power-on sequence for A1 SoC family | Dmitry Rokosov | 2 | -0/+25 |
| 2023-05-30 | clk: meson: make pll rst bit as optional | Dmitry Rokosov | 1 | -7/+17 |
| 2023-01-13 | clk: meson: clk-cpu-dyndiv: switch from .round_rate to .determine_rate | Martin Blumenstingl | 1 | -5/+4 |
| 2023-01-13 | clk: meson: sclk-div: switch from .round_rate to .determine_rate | Martin Blumenstingl | 1 | -5/+6 |
| 2023-01-13 | clk: meson: dualdiv: switch from .round_rate to .determine_rate | Martin Blumenstingl | 1 | -8/+13 |
| 2023-01-13 | clk: meson: mpll: Switch from .round_rate to .determine_rate | Martin Blumenstingl | 1 | -7/+13 |
| 2022-12-12 | Merge branches 'clk-bindings', 'clk-renesas', 'clk-amlogic', 'clk-allwinner' ... | Stephen Boyd | 1 | -8/+12 |
| 2022-11-22 | clk: Remove a useless include | Christophe JAILLET | 1 | -1/+0 |
| 2022-11-08 | clk: meson: pll: add pcie lock retry workaround | Heiner Kallweit | 1 | -4/+8 |
| 2022-11-08 | clk: meson: pll: adjust timeout in meson_clk_pll_wait_lock() | Heiner Kallweit | 1 | -4/+4 |
| 2022-08-19 | clk: meson: Hold reference returned by of_get_parent() | Liang He | 3 | -3/+12 |
| 2022-06-15 | clk: meson: axg-audio: Don't duplicate devm_clk_get_enabled() | Uwe Kleine-König | 1 | -32/+4 |
| 2022-03-11 | clk: cleanup comments | Tom Rix | 1 | -1/+1 |
| 2021-11-30 | clk: meson: gxbb: Fix the SDM_EN bit for MPLL0 on GXBB | Martin Blumenstingl | 1 | -3/+41 |
| 2021-09-23 | clk: meson: meson8b: Make the video clock trees mutable | Martin Blumenstingl | 1 | -38/+38 |
| 2021-09-23 | clk: meson: meson8b: Initialize the HDMI PLL registers | Martin Blumenstingl | 2 | -5/+48 |
| 2021-09-23 | clk: meson: meson8b: Add the HDMI PLL M/N parameters | Martin Blumenstingl | 1 | -0/+22 |
| 2021-09-23 | clk: meson: meson8b: Add the vid_pll_lvds_en gate clock | Martin Blumenstingl | 2 | -2/+24 |
| 2021-09-23 | clk: meson: meson8b: Use CLK_SET_RATE_NO_REPARENT for vclk{,2}_in_sel | Martin Blumenstingl | 1 | -2/+2 |
| 2021-09-23 | clk: meson: meson8b: Export the video clocks | Martin Blumenstingl | 1 | -11/+1 |
| 2021-06-30 | clk: meson: regmap: switch to determine_rate for the dividers | Martin Blumenstingl | 1 | -10/+9 |
| 2021-06-09 | clk: meson: g12a: Add missing NNA source clocks for g12b | Nick Xie | 1 | -0/+6 |
| 2021-05-24 | clk: meson: axg-audio: improve deferral handling | Jerome Brunet | 1 | -3/+2 |
| 2021-05-20 | clk: meson: g12a: fix gp0 and hifi ranges | Jerome Brunet | 1 | -1/+1 |
| 2021-05-19 | clk: meson: pll: switch to determine_rate for the PLL ops | Martin Blumenstingl | 1 | -11/+15 |
| 2021-02-09 | clk: meson: axg: Remove MIPI enable clock gate | Remi Pommarel | 2 | -4/+0 |
| 2021-01-04 | clk: meson: meson8b: remove compatibility code for old .dtbs | Martin Blumenstingl | 1 | -40/+5 |
| 2021-01-04 | clk: meson: clk-pll: propagate the error from meson_clk_pll_set_rate() | Martin Blumenstingl | 1 | -2/+3 |
| 2021-01-04 | clk: meson: clk-pll: make "ret" a signed integer | Martin Blumenstingl | 1 | -1/+2 |
| 2021-01-04 | clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL | Martin Blumenstingl | 1 | -1/+1 |
| 2020-12-21 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 11 | -61/+1004 |
| 2020-11-26 | clk: meson: g12a: add MIPI DSI Host Pixel Clock | Neil Armstrong | 2 | -1/+76 |
| 2020-11-23 | clk: meson: enable building as modules | Kevin Hilman | 9 | -9/+34 |
| 2020-11-23 | clk: meson: Kconfig: fix dependency for G12A | Kevin Hilman | 1 | -0/+1 |
| 2020-11-23 | clk: meson: axg: add MIPI DSI Host clock | Neil Armstrong | 2 | -1/+69 |
| 2020-11-23 | clk: meson: axg: add Video Clocks | Neil Armstrong | 2 | -1/+773 |
| 2020-11-14 | clk: meson: g12: use devm variant to register notifiers | Jerome Brunet | 1 | -14/+20 |
| 2020-11-14 | clk: meson: g12: drop use of __clk_lookup() | Jerome Brunet | 1 | -36/+32 |
| 2020-10-28 | clk: define to_clk_regmap() as inline function | Arnd Bergmann | 1 | -1/+4 |
| 2020-10-20 | Merge branches 'clk-semicolon', 'clk-axi-clkgen', 'clk-qoriq', 'clk-baikal', ... | Stephen Boyd | 1 | -1/+1 |
| 2020-10-13 | clk: meson: use semicolons rather than commas to separate statements | Julia Lawall | 1 | -1/+1 |
| 2020-09-10 | clk: meson: make shipped controller configurable | Jerome Brunet | 1 | -9/+17 |
| 2020-08-29 | clk: meson: g12a: mark fclk_div2 as critical | Stefan Agner | 1 | -0/+11 |
| 2020-08-17 | clk: meson: axg-audio: fix g12a tdmout sclk inverter | Jerome Brunet | 1 | -25/+60 |
| 2020-08-17 | clk: meson: axg-audio: separate axg and g12a regmap tables | Jerome Brunet | 1 | -8/+127 |
| 2020-08-17 | clk: meson: add sclk-ws driver | Jerome Brunet | 2 | -0/+62 |
| 2020-07-21 | Merge branch 'clk-amlogic' into clk-next | Stephen Boyd | 4 | -19/+178 |
| 2020-07-10 | Replace HTTP links with HTTPS ones: Common CLK framework | Alexander A. Klimov | 1 | -1/+1 |
| 2020-07-09 | clk: meson: meson8b: add the vclk2_en gate clock | Martin Blumenstingl | 2 | -6/+27 |
| 2020-07-09 | clk: meson: meson8b: add the vclk_en gate clock | Martin Blumenstingl | 2 | -6/+27 |
| 2020-06-24 | clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2 | Martin Blumenstingl | 1 | -7/+0 |
| 2020-06-19 | clk: meson: g12a: Add support for NNA CLK source clocks | Dmitry Shmidt | 2 | -1/+125 |
| 2020-05-02 | clk: meson: meson8b: Don't rely on u-boot to init all GP_PLL registers | Martin Blumenstingl | 2 | -0/+13 |
| 2020-04-29 | clk: meson: meson8b: Make the CCF use the glitch-free VPU mux | Martin Blumenstingl | 1 | -3/+11 |
| 2020-04-29 | clk: meson: meson8b: Fix the vclk_div{1, 2, 4, 6, 12}_en gate bits | Martin Blumenstingl | 1 | -5/+5 |
| 2020-04-29 | clk: meson: meson8b: Fix the polarity of the RESET_N lines | Martin Blumenstingl | 1 | -23/+56 |
| 2020-04-29 | clk: meson: meson8b: Fix the first parent of vid_pll_in_sel | Martin Blumenstingl | 1 | -1/+1 |
| 2020-04-16 | clk: meson: g12a: Prepare the GPU clock tree to change at runtime | Martin Blumenstingl | 1 | -8/+22 |
| 2020-04-16 | clk: meson: gxbb: Prepare the GPU clock tree to change at runtime | Martin Blumenstingl | 1 | -18/+22 |
| 2020-04-14 | clk: meson: meson8b: make the hdmi_sys clock tree mutable | Martin Blumenstingl | 1 | -3/+3 |
| 2020-04-14 | clk: meson8b: export the HDMI system clock | Martin Blumenstingl | 1 | -1/+0 |
| 2020-02-21 | clk: meson: meson8b: set audio output clock hierarchy | Martin Blumenstingl | 1 | -8/+13 |
| 2020-02-19 | clk: meson: g12a: add support for the SPICC SCLK Source clocks | Neil Armstrong | 2 | -1/+134 |
| 2020-02-13 | clk: meson: gxbb: set audio output clock hierarchy | Jerome Brunet | 1 | -8/+10 |
| 2020-02-13 | clk: meson: gxbb: add the gxl internal dac gate | Jerome Brunet | 2 | -1/+4 |
| 2020-01-31 | Merge branches 'clk-debugfs-danger', 'clk-basic-hw', 'clk-renesas', 'clk-amlo... | Stephen Boyd | 5 | -56/+229 |
| 2020-01-07 | clk: meson: meson8b: make the CCF use the glitch-free mali mux | Martin Blumenstingl | 1 | -4/+7 |
| 2019-12-23 | clk: let init callback return an error code | Jerome Brunet | 4 | -4/+12 |
| 2019-12-16 | Merge branch 'v5.5/fixes' into v5.6/drivers | Jerome Brunet | 2 | -0/+10 |
| 2019-12-16 | clk: meson: pll: Fix by 0 division in __pll_params_to_rate() | Remi Pommarel | 1 | -0/+9 |
| 2019-12-16 | clk: meson: g12a: fix missing uart2 in regmap table | Jerome Brunet | 1 | -0/+1 |
| 2019-12-11 | clk: meson: meson8b: use of_clk_hw_register to register the clocks | Martin Blumenstingl | 1 | -1/+1 |
| 2019-12-11 | clk: meson: meson8b: don't register the XTAL clock when provided via OF | Martin Blumenstingl | 1 | -3/+9 |
| 2019-12-11 | clk: meson: meson8b: change references to the XTAL clock to use [fw_]name | Martin Blumenstingl | 1 | -34/+44 |
| 2019-12-11 | clk: meson: meson8b: use clk_hw_set_parent in the CPU clock notifier | Martin Blumenstingl | 1 | -13/+8 |
| 2019-12-11 | clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller | Martin Blumenstingl | 2 | -1/+150 |
| 2019-10-14 | clk: meson: axg-audio: use devm_platform_ioremap_resource() to simplify code | YueHaibing | 1 | -3/+1 |
| 2019-10-08 | clk: meson: axg_audio: add sm1 support | Jerome Brunet | 2 | -30/+574 |
| 2019-10-08 | clk: meson: axg-audio: provide clk top signal name | Jerome Brunet | 2 | -4/+17 |
| 2019-10-08 | clk: meson: axg-audio: prepare sm1 addition | Jerome Brunet | 1 | -684/+781 |
| 2019-10-08 | clk: meson: axg-audio: fix regmap last register | Jerome Brunet | 1 | -1/+1 |
| 2019-10-08 | clk: meson: axg-audio: remove useless defines | Jerome Brunet | 1 | -4/+0 |
| 2019-10-01 | clk: meson: g12a: set CLK_MUX_ROUND_CLOSEST on the cpu clock muxes | Neil Armstrong | 1 | -0/+9 |
| 2019-10-01 | clk: meson: g12a: fix cpu clock rate setting | Neil Armstrong | 1 | -2/+2 |
| 2019-10-01 | clk: meson: gxbb: let sar_adc_clk_div set the parent clock rate | Martin Blumenstingl | 1 | -0/+1 |
| 2019-09-19 | Merge branches 'clk-init-destroy', 'clk-doc', 'clk-imx' and 'clk-allwinner' i... | Stephen Boyd | 1 | -2/+5 |
| 2019-08-26 | clk: meson: g12a: add support for SM1 CPU 1, 2 & 3 clocks | Neil Armstrong | 2 | -1/+61 |
| 2019-08-26 | clk: meson: g12a: add support for SM1 DynamIQ Shared Unit clock | Neil Armstrong | 2 | -1/+198 |
| 2019-08-26 | clk: meson: g12a: add support for SM1 GP1 PLL | Neil Armstrong | 2 | -1/+310 |
| 2019-08-20 | clk: meson: axg-audio: add g12a reset support | Jerome Brunet | 2 | -2/+106 |
| 2019-08-16 | clk: meson: axg-audio: Don't reference clk_init_data after registration | Stephen Boyd | 1 | -2/+5 |
| 2019-08-09 | Merge branch 'v5.4/dt' into v5.4/drivers | Jerome Brunet | 1 | -1/+0 |
| 2019-08-09 | clk: meson: g12a: expose CPUB clock ID for G12B | Neil Armstrong | 1 | -1/+0 |
| 2019-08-09 | clk: meson: g12a: add notifiers to handle cpu clock change | Neil Armstrong | 1 | -52/+479 |
