diff options
| -rw-r--r-- | ldp/framebuffer-add-the-via-framebuffer-driver.patch | 4608 |
1 files changed, 2285 insertions, 2323 deletions
diff --git a/ldp/framebuffer-add-the-via-framebuffer-driver.patch b/ldp/framebuffer-add-the-via-framebuffer-driver.patch index dda97f7e569f53..3e1a3e96ace500 100644 --- a/ldp/framebuffer-add-the-via-framebuffer-driver.patch +++ b/ldp/framebuffer-add-the-via-framebuffer-driver.patch @@ -23,9 +23,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> drivers/video/viafb/accel.h | 190 ++ drivers/video/viafb/chip.h | 189 ++ drivers/video/viafb/debug.h | 41 - drivers/video/viafb/dvi.c | 722 ++++++++ - drivers/video/viafb/dvi.h | 69 - drivers/video/viafb/global.c | 170 ++ + drivers/video/viafb/dvi.c | 724 ++++++++ + drivers/video/viafb/dvi.h | 68 + drivers/video/viafb/global.c | 169 ++ drivers/video/viafb/global.h | 98 + drivers/video/viafb/hw.c | 2924 ++++++++++++++++++++++++++++++++++++ drivers/video/viafb/hw.h | 950 +++++++++++ @@ -33,8 +33,8 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> drivers/video/viafb/iface.h | 38 drivers/video/viafb/ioctl.c | 111 + drivers/video/viafb/ioctl.h | 212 ++ - drivers/video/viafb/lcd.c | 2306 ++++++++++++++++++++++++++++ - drivers/video/viafb/lcd.h | 119 + + drivers/video/viafb/lcd.c | 2275 ++++++++++++++++++++++++++++ + drivers/video/viafb/lcd.h | 118 + drivers/video/viafb/share.h | 1113 +++++++++++++ drivers/video/viafb/tbl1636.c | 71 drivers/video/viafb/tbl1636.h | 34 @@ -45,13 +45,13 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> drivers/video/viafb/via_utility.c | 299 +++ drivers/video/viafb/via_utility.h | 35 drivers/video/viafb/viafb.modes | 870 ++++++++++ - drivers/video/viafb/viafbdev.c | 2775 ++++++++++++++++++++++++++++++++++ - drivers/video/viafb/viafbdev.h | 113 + + drivers/video/viafb/viafbdev.c | 2780 ++++++++++++++++++++++++++++++++++ + drivers/video/viafb/viafbdev.h | 102 + drivers/video/viafb/viamode.c | 1086 +++++++++++++ drivers/video/viafb/viamode.h | 177 ++ drivers/video/viafb/vt1636.c | 317 +++ drivers/video/viafb/vt1636.h | 47 - 35 files changed, 16091 insertions(+) + 35 files changed, 16053 insertions(+) --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -79,6 +79,18 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> # Platform or fallback drivers go here obj-$(CONFIG_FB_UVESA) += uvesafb.o --- /dev/null ++++ b/drivers/video/viafb/Makefile +@@ -0,0 +1,9 @@ ++# ++# Makefile for the VIA framebuffer driver (for Linux Kernel 2.6) ++# ++ ++obj-$(CONFIG_FB_VIA) += viafb.o ++ ++viafb-y := viafbdev.o hw.o iface.o via_i2c.o dvi.o lcd.o ioctl.o accel.o via_utility.o vt1636.o global.o tblDPASetting.o viamode.o tbl1636.o ++ ++viafb-objs := $(viafb-y) +--- /dev/null +++ b/drivers/video/viafb/accel.c @@ -0,0 +1,245 @@ +/* @@ -354,43 +366,43 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> +#define __ACCEL_H__ + +#ifndef FB_ACCEL_VIA_UNICHROME -+#define FB_ACCEL_VIA_UNICHROME 50 ++#define FB_ACCEL_VIA_UNICHROME 50 +#endif + +/* MMIO Base Address Definition */ -+#define MMIO_VGABASE 0x8000 -+#define MMIO_CR_READ MMIO_VGABASE + 0x3D4 -+#define MMIO_CR_WRITE MMIO_VGABASE + 0x3D5 -+#define MMIO_SR_READ MMIO_VGABASE + 0x3C4 -+#define MMIO_SR_WRITE MMIO_VGABASE + 0x3C5 ++#define MMIO_VGABASE 0x8000 ++#define MMIO_CR_READ MMIO_VGABASE + 0x3D4 ++#define MMIO_CR_WRITE MMIO_VGABASE + 0x3D5 ++#define MMIO_SR_READ MMIO_VGABASE + 0x3C4 ++#define MMIO_SR_WRITE MMIO_VGABASE + 0x3C5 + +#ifndef VIA_MMIO -+#define VIA_MMIO 1 ++#define VIA_MMIO 1 +#endif + +#if VIA_MMIO -+#define MMIO_OUT8(reg, val) writeb(val, parinfo.io_virt + reg) -+#define MMIO_OUT16(reg, val) writew(val, parinfo.io_virt + reg) -+#define MMIO_OUT32(reg, val) writel(val, parinfo.io_virt + reg) -+#define MMIO_IN8(reg) readb(parinfo.io_virt + reg) -+#define MMIO_IN16(reg) readw(parinfo.io_virt + reg) -+#define MMIO_IN32(reg) readl(parinfo.io_virt + reg) ++#define MMIO_OUT8(reg, val) writeb(val, parinfo.io_virt + reg) ++#define MMIO_OUT16(reg, val) writew(val, parinfo.io_virt + reg) ++#define MMIO_OUT32(reg, val) writel(val, parinfo.io_virt + reg) ++#define MMIO_IN8(reg) readb(parinfo.io_virt + reg) ++#define MMIO_IN16(reg) readw(parinfo.io_virt + reg) ++#define MMIO_IN32(reg) readl(parinfo.io_virt + reg) + +#else -+#define MMIO_OUT8(reg, val) outb(val, reg) -+#define MMIO_OUT16(reg, val) outw(val, reg) -+#define MMIO_OUT32(reg, val) outl(val, reg) -+#define MMIO_IN8(reg) inb(reg) -+#define MMIO_IN16(reg) inw(reg) -+#define MMIO_IN32(reg) inl(reg) ++#define MMIO_OUT8(reg, val) outb(val, reg) ++#define MMIO_OUT16(reg, val) outw(val, reg) ++#define MMIO_OUT32(reg, val) outl(val, reg) ++#define MMIO_IN8(reg) inb(reg) ++#define MMIO_IN16(reg) inw(reg) ++#define MMIO_IN32(reg) inl(reg) +#endif + +/* HW Cursor Status Define */ -+#define HW_Cursor_ON 0 -+#define HW_Cursor_OFF 1 ++#define HW_Cursor_ON 0 ++#define HW_Cursor_OFF 1 + -+#define CURSOR_SIZE (8 * 1024) -+#define VQ_SIZE (256 * 1024) ++#define CURSOR_SIZE (8 * 1024) ++#define VQ_SIZE (256 * 1024) + +#define VIA_MMIO_BLTBASE 0x200000 +#define VIA_MMIO_BLTSIZE 0x200000 @@ -515,7 +527,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> +void init_2d_engine(void); +void set_2d_color_depth(int); +void hw_cursor_init(void); -+void show_hw_cursor(struct fb_info *info, int Status); ++void show_hw_cursor(struct fb_info *info, int status); +int wait_engine_idle(void); + +#endif /* __ACCEL_H__ */ @@ -757,7 +769,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> +#endif /* __DEBUG_H__ */ --- /dev/null +++ b/drivers/video/viafb/dvi.c -@@ -0,0 +1,722 @@ +@@ -0,0 +1,724 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. @@ -780,7 +792,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + */ +#include "global.h" + -+int check_tmds_chip(int device_id_subaddr, int device_id) ++static int check_tmds_chip(int device_id_subaddr, int device_id) +{ + if (tmds_register_read(device_id_subaddr) == device_id) + return (OK); @@ -790,7 +802,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + +void init_dvi_size(void) +{ -+ DEBUG_MSG(KERN_INFO "init_dvi_size()\n"); ++ DEBUG_MSG(KERN_INFO "%s()\n", __func__); + DEBUG_MSG(KERN_INFO "tmds_setting_info.get_dvi_size_method %d\n", + tmds_setting_info.get_dvi_size_method); + @@ -947,7 +959,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + return (data); +} + -+int tmds_register_read_bytes(int index, u8 *buff, int buff_len) ++static int tmds_register_read_bytes(int index, u8 *buff, int buff_len) +{ + int status; + u8 tmp; @@ -971,7 +983,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + return (status); +} + -+int check_reduce_blanking_mode(int mode_index, int refresh_rate) ++static int check_reduce_blanking_mode(int mode_index, int refresh_rate) +{ + if (refresh_rate != 60) + return (FALSE); @@ -1140,7 +1152,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + * Return Type: int + * + */ -+int dvi_get_panel_size_from_DDCv1(void) ++static int dvi_get_panel_size_from_DDCv1(void) +{ + int i, max_h = 0, max_v = 0, tmp, restore; + unsigned char rData; @@ -1259,7 +1271,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + * Return Type: int + * + */ -+int dvi_get_panel_size_from_DDCv2(void) ++static int dvi_get_panel_size_from_DDCv2(void) +{ + int HSize = 0, restore; + unsigned char R_Buffer[2]; @@ -1418,7 +1430,8 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + } +} + -+int check_hdmi_connected_device(void) ++#if 0 /* Not used */ ++static int check_hdmi_connected_device(void) +{ + int bEdidExist = FALSE; + u8 byTemp = 0, byTemp1 = 0, byTemp2 = 0; @@ -1480,9 +1493,10 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + chip_info.tmds_chip_info.tmds_chip_slave_addr = restore; + return result; +} ++#endif --- /dev/null +++ b/drivers/video/viafb/dvi.h -@@ -0,0 +1,69 @@ +@@ -0,0 +1,68 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. @@ -1538,7 +1552,6 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> +#define DEV_CONNECT_DVI 0x01 +#define DEV_CONNECT_HDMI 0x02 + -+int check_hdmi_connected_device(void); +struct VideoModeTable *get_cea_mode_tbl_pointer(int Index); +int tmds_register_read(int index); +void tmds_register_write(int index, u8 data); @@ -1554,7 +1567,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> +#endif /* __DVI_H__ */ --- /dev/null +++ b/drivers/video/viafb/global.c -@@ -0,0 +1,170 @@ +@@ -0,0 +1,169 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. @@ -1606,7 +1619,6 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> +unsigned int second_xres = 640; +unsigned int second_yres = 480; +unsigned int second_virtual_xres; -+unsigned int second_virtual_yres; +int lcd_panel_id = LCD_PANEL_ID_MAXIMUM + 1; +struct fb_cursor viacursor; +struct fb_info viafbinfo1; @@ -2056,7 +2068,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {IGA2_VER_SYNC_END_REG_NUM, {{CR5F, 0, 4} } } +}; + -+struct rgbLUT palLUT_table[] = { ++static struct rgbLUT palLUT_table[] = { + /* {R,G,B} */ + /* Index 0x00~0x03 */ + {0x00, 0x00, 0x00}, {0x00, 0x00, 0x2A}, {0x00, 0x2A, 0x00}, {0x00, @@ -2349,7 +2361,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + /*DEBUG_MSG(KERN_INFO "\nIndex=%2d Value=%2d", index, tmp); */ +} + -+void write_dac_reg(u8 index, u8 r, u8 g, u8 b) ++static void write_dac_reg(u8 index, u8 r, u8 g, u8 b) +{ + outb(index, LUT_INDEX_WRITE); + outb(r, LUT_DATA); @@ -2472,6 +2484,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + } + + if (SAMM_ON == 1) { ++ void __iomem *offset_addr = FB_MM + second_offset; + if (via_fb_accel) { + if (!dual_fb) + length = size - parinfo.fbmem_used; @@ -2479,8 +2492,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + length = size - parinfo1.fbmem_used; + } else + length = size; -+ offset = (unsigned long)(void *)FB_MM + second_offset; -+ memset_io((void *)offset, 0, length); ++ memset_io(offset_addr, 0, length); + } + + lock_crt(); @@ -2519,7 +2531,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + } +} + -+void dvi_patch_skew_dvp0(void) ++static void dvi_patch_skew_dvp0(void) +{ + /* Reset data driving first: */ + write_reg_mask(SR1B, VIASR, 0, BIT1); @@ -2554,7 +2566,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + } +} + -+void dvi_patch_skew_dvp1(void) ++static void dvi_patch_skew_dvp1(void) +{ + switch (chip_info.gfx_chip_name) { + case UNICHROME_CX700: @@ -2569,7 +2581,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + } +} + -+void dvi_patch_skew_dvp_low(void) ++static void dvi_patch_skew_dvp_low(void) +{ + switch (chip_info.gfx_chip_name) { + case UNICHROME_K8M890: @@ -4551,7 +4563,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + } +} + -+int get_fb_size_from_pci() ++int get_fb_size_from_pci(void) +{ + unsigned long configid, deviceid, FBSize = 0; + int VideoMemSize; @@ -6159,7 +6171,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> +#endif /* __IOCTL_H__ */ --- /dev/null +++ b/drivers/video/viafb/lcd.c -@@ -0,0 +1,2306 @@ +@@ -0,0 +1,2275 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. @@ -6186,14 +6198,14 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + +/* CLE266 Software Power Sequence */ +/* {Mask}, {Data}, {Delay} */ -+int PowerSequenceOn[3][3] = -+ { {0x10, 0x08, 0x06}, {0x10, 0x08, 0x06}, {0x19, 0x1FE, 0x01} }; -+int PowerSequenceOff[3][3] = -+ { {0x06, 0x08, 0x10}, {0x00, 0x00, 0x00}, {0xD2, 0x19, 0x01} }; ++static int PowerSequenceOn[3][3] = ++ { {0x10, 0x08, 0x06}, {0x10, 0x08, 0x06}, {0x19, 0x1FE, 0x01} }; ++static int PowerSequenceOff[3][3] = ++ { {0x06, 0x08, 0x10}, {0x00, 0x00, 0x00}, {0xD2, 0x19, 0x01} }; + +/* ++++++ P880 ++++++ */ +/* Panel 1600x1200 */ -+struct io_reg P880_LCD_RES_6X4_16X12[] = { ++static struct io_reg P880_LCD_RES_6X4_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x73}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ @@ -6207,12 +6219,10 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIACR, CR66, 0xFF, 0xD6}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR44, 0xFF, 0x7D}, {VIASR, SR45, 0xFF, 0x8C}, + {VIASR, SR46, 0xFF, 0x02} -+ +}; -+ +#define NUM_TOTAL_P880_LCD_RES_6X4_16X12 ARRAY_SIZE(P880_LCD_RES_6X4_16X12) + -+struct io_reg P880_LCD_RES_7X4_16X12[] = { ++static struct io_reg P880_LCD_RES_7X4_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x67}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ @@ -6226,12 +6236,10 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIACR, CR66, 0xFF, 0xF5}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR44, 0xFF, 0x78}, {VIASR, SR45, 0xFF, 0x8C}, + {VIASR, SR46, 0xFF, 0x01} -+ +}; -+ +#define NUM_TOTAL_P880_LCD_RES_7X4_16X12 ARRAY_SIZE(P880_LCD_RES_7X4_16X12) + -+struct io_reg P880_LCD_RES_8X6_16X12[] = { ++static struct io_reg P880_LCD_RES_8X6_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ @@ -6245,12 +6253,10 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIACR, CR66, 0xFF, 0xE1}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR44, 0xFF, 0x6D}, {VIASR, SR45, 0xFF, 0x88}, + {VIASR, SR46, 0xFF, 0x03} -+ +}; -+ +#define NUM_TOTAL_P880_LCD_RES_8X6_16X12 ARRAY_SIZE(P880_LCD_RES_8X6_16X12) + -+struct io_reg P880_LCD_RES_10X7_16X12[] = { ++static struct io_reg P880_LCD_RES_10X7_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ @@ -6266,10 +6272,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIASR, SR46, 0xFF, 0x03} + +}; -+ +#define NUM_TOTAL_P880_LCD_RES_10X7_16X12 ARRAY_SIZE(P880_LCD_RES_10X7_16X12) + -+struct io_reg P880_LCD_RES_12X10_16X12[] = { ++static struct io_reg P880_LCD_RES_12X10_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x7D}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ @@ -6283,13 +6288,11 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIACR, CR66, 0xFF, 0xFA}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR44, 0xFF, 0xF6}, {VIASR, SR45, 0xFF, 0x88}, + {VIASR, SR46, 0xFF, 0x05} -+ +}; -+ +#define NUM_TOTAL_P880_LCD_RES_12X10_16X12 ARRAY_SIZE(P880_LCD_RES_12X10_16X12) + +/* Panel 1400x1050 */ -+struct io_reg P880_LCD_RES_6X4_14X10[] = { ++static struct io_reg P880_LCD_RES_6X4_14X10[] = { + /* 640x480 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56}, @@ -6306,10 +6309,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIASR, SR44, 0xFF, 0xC6}, {VIASR, SR45, 0xFF, 0x8C}, + {VIASR, SR46, 0xFF, 0x05} +}; -+ +#define NUM_TOTAL_P880_LCD_RES_6X4_14X10 ARRAY_SIZE(P880_LCD_RES_6X4_14X10) + -+struct io_reg P880_LCD_RES_8X6_14X10[] = { ++static struct io_reg P880_LCD_RES_8X6_14X10[] = { + /* 800x600 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56}, @@ -6326,12 +6328,11 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIASR, SR44, 0xFF, 0x06}, {VIASR, SR45, 0xFF, 0x8D}, + {VIASR, SR46, 0xFF, 0x05} +}; -+ +#define NUM_TOTAL_P880_LCD_RES_8X6_14X10 ARRAY_SIZE(P880_LCD_RES_8X6_14X10) + +/* ++++++ K400 ++++++ */ +/* Panel 1600x1200 */ -+struct io_reg K400_LCD_RES_6X4_16X12[] = { ++static struct io_reg K400_LCD_RES_6X4_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x73}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ @@ -6345,10 +6346,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIACR, CR66, 0xFF, 0xDA}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0xC4}, {VIASR, SR47, 0xFF, 0x7F} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_6X4_16X12 ARRAY_SIZE(K400_LCD_RES_6X4_16X12) + -+struct io_reg K400_LCD_RES_7X4_16X12[] = { ++static struct io_reg K400_LCD_RES_7X4_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x67}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ @@ -6362,10 +6362,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIACR, CR66, 0xFF, 0xF5}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x46}, {VIASR, SR47, 0xFF, 0x3D} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_7X4_16X12 ARRAY_SIZE(K400_LCD_RES_7X4_16X12) + -+struct io_reg K400_LCD_RES_8X6_16X12[] = { ++static struct io_reg K400_LCD_RES_8X6_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ @@ -6379,10 +6378,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIACR, CR66, 0xFF, 0xE1}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x85}, {VIASR, SR47, 0xFF, 0x6F} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_8X6_16X12 ARRAY_SIZE(K400_LCD_RES_8X6_16X12) + -+struct io_reg K400_LCD_RES_10X7_16X12[] = { ++static struct io_reg K400_LCD_RES_10X7_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ @@ -6396,10 +6394,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIACR, CR66, 0xFF, 0xF0}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x45}, {VIASR, SR47, 0xFF, 0x4A} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_10X7_16X12 ARRAY_SIZE(K400_LCD_RES_10X7_16X12) + -+struct io_reg K400_LCD_RES_12X10_16X12[] = { ++static struct io_reg K400_LCD_RES_12X10_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x7D}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ @@ -6413,11 +6410,10 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIACR, CR66, 0xFF, 0xFA}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x47}, {VIASR, SR47, 0xFF, 0x7C} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_12X10_16X12 ARRAY_SIZE(K400_LCD_RES_12X10_16X12) + +/* Panel 1400x1050 */ -+struct io_reg K400_LCD_RES_6X4_14X10[] = { ++static struct io_reg K400_LCD_RES_6X4_14X10[] = { + /* 640x400 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56}, @@ -6433,10 +6429,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + /* VCLK */ + {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x19} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_6X4_14X10 ARRAY_SIZE(K400_LCD_RES_6X4_14X10) + -+struct io_reg K400_LCD_RES_8X6_14X10[] = { ++static struct io_reg K400_LCD_RES_8X6_14X10[] = { + /* 800x600 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56}, @@ -6452,10 +6447,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + /* VCLK */ + {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x21} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_8X6_14X10 ARRAY_SIZE(K400_LCD_RES_8X6_14X10) + -+struct io_reg K400_LCD_RES_10X7_14X10[] = { ++static struct io_reg K400_LCD_RES_10X7_14X10[] = { + /* 1024x768 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56}, @@ -6471,10 +6465,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + /* VCLK */ + {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x1E} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_10X7_14X10 ARRAY_SIZE(K400_LCD_RES_10X7_14X10) + -+struct io_reg K400_LCD_RES_12X10_14X10[] = { ++static struct io_reg K400_LCD_RES_12X10_14X10[] = { + /* 1280x768, 1280x960, 1280x1024 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x97}, {VIACR, CR55, 0x0F, 0x56}, @@ -6490,12 +6483,11 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + /* VCLK */ + {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0x79} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_12X10_14X10 ARRAY_SIZE(K400_LCD_RES_12X10_14X10) + +/* ++++++ K400 ++++++ */ +/* Panel 1366x768 */ -+struct io_reg K400_LCD_RES_6X4_1366X7[] = { ++static struct io_reg K400_LCD_RES_6X4_1366X7[] = { + /* 640x400 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x47}, {VIACR, CR55, 0x0F, 0x35}, @@ -6511,10 +6503,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + /* VCLK */ + {VIASR, SR46, 0xFF, 0x87}, {VIASR, SR47, 0xFF, 0x4C} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_6X4_1366X7 ARRAY_SIZE(K400_LCD_RES_6X4_1366X7) + -+struct io_reg K400_LCD_RES_7X4_1366X7[] = { ++static struct io_reg K400_LCD_RES_7X4_1366X7[] = { + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x3B}, {VIACR, CR55, 0x0F, 0x35}, + /* IGA2 Horizontal Blank End */ @@ -6529,10 +6520,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + /* VCLK */ + {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x10} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_7X4_1366X7 ARRAY_SIZE(K400_LCD_RES_7X4_1366X7) + -+struct io_reg K400_LCD_RES_8X6_1366X7[] = { ++static struct io_reg K400_LCD_RES_8X6_1366X7[] = { + /* 800x600 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x37}, {VIACR, CR55, 0x0F, 0x35}, @@ -6548,10 +6538,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + /* VCLK */ + {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0xB9} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_8X6_1366X7 ARRAY_SIZE(K400_LCD_RES_8X6_1366X7) + -+struct io_reg K400_LCD_RES_10X7_1366X7[] = { ++static struct io_reg K400_LCD_RES_10X7_1366X7[] = { + /* 1024x768 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56}, @@ -6567,10 +6556,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + /* VCLK */ + {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x1E} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_10X7_1366X7 ARRAY_SIZE(K400_LCD_RES_10X7_1366X7) + -+struct io_reg K400_LCD_RES_12X10_1366X7[] = { ++static struct io_reg K400_LCD_RES_12X10_1366X7[] = { + /* 1280x768, 1280x960, 1280x1024 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x97}, {VIACR, CR55, 0x0F, 0x56}, @@ -6586,13 +6574,12 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + /* VCLK */ + {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0x79} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_12X10_1366X7\ + ARRAY_SIZE(K400_LCD_RES_12X10_1366X7) + +/* ++++++ K400 ++++++ */ +/* Panel 1280x1024 */ -+struct io_reg K400_LCD_RES_6X4_12X10[] = { ++static struct io_reg K400_LCD_RES_6X4_12X10[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46}, + /*IGA2 Horizontal Blank End */ @@ -6606,10 +6593,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIACR, CR66, 0xFF, 0xAA}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x19} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_6X4_12X10 ARRAY_SIZE(K400_LCD_RES_6X4_12X10) + -+struct io_reg K400_LCD_RES_7X4_12X10[] = { ++static struct io_reg K400_LCD_RES_7X4_12X10[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46}, + /*IGA2 Horizontal Blank End */ @@ -6623,10 +6609,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIACR, CR66, 0xFF, 0xA8}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x87}, {VIASR, SR47, 0xFF, 0xED} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_7X4_12X10 ARRAY_SIZE(K400_LCD_RES_7X4_12X10) + -+struct io_reg K400_LCD_RES_8X6_12X10[] = { ++static struct io_reg K400_LCD_RES_8X6_12X10[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46}, + /*IGA2 Horizontal Blank End */ @@ -6640,10 +6625,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x21} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_8X6_12X10 ARRAY_SIZE(K400_LCD_RES_8X6_12X10) + -+struct io_reg K400_LCD_RES_10X7_12X10[] = { ++static struct io_reg K400_LCD_RES_10X7_12X10[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46}, + /*IGA2 Horizontal Blank End */ @@ -6657,12 +6641,11 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x04}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x1E} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_10X7_12X10 ARRAY_SIZE(K400_LCD_RES_10X7_12X10) + +/* ++++++ K400 ++++++ */ +/* Panel 1024x768 */ -+struct io_reg K400_LCD_RES_6X4_10X7[] = { ++static struct io_reg K400_LCD_RES_6X4_10X7[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x47}, {VIACR, CR55, 0x0F, 0x35}, + /*IGA2 Horizontal Blank End */ @@ -6676,10 +6659,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x87}, {VIASR, SR47, 0xFF, 0x4C} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_6X4_10X7 ARRAY_SIZE(K400_LCD_RES_6X4_10X7) + -+struct io_reg K400_LCD_RES_7X4_10X7[] = { ++static struct io_reg K400_LCD_RES_7X4_10X7[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x3B}, {VIACR, CR55, 0x0F, 0x35}, + /*IGA2 Horizontal Blank End */ @@ -6693,10 +6675,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIACR, CR66, 0xFF, 0x96}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x10} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_7X4_10X7 ARRAY_SIZE(K400_LCD_RES_7X4_10X7) + -+struct io_reg K400_LCD_RES_8X6_10X7[] = { ++static struct io_reg K400_LCD_RES_8X6_10X7[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x37}, {VIACR, CR55, 0x0F, 0x35}, + /*IGA2 Horizontal Blank End */ @@ -6710,12 +6691,11 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0xB9} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_8X6_10X7 ARRAY_SIZE(K400_LCD_RES_8X6_10X7) + +/* ++++++ K400 ++++++ */ +/* Panel 800x600 */ -+struct io_reg K400_LCD_RES_6X4_8X6[] = { ++static struct io_reg K400_LCD_RES_6X4_8X6[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x1A}, {VIACR, CR55, 0x0F, 0x34}, + /*IGA2 Horizontal Blank End */ @@ -6729,10 +6709,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIACR, CR66, 0xFF, 0x6E}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x86}, {VIASR, SR47, 0xFF, 0xB3} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_6X4_8X6 ARRAY_SIZE(K400_LCD_RES_6X4_8X6) + -+struct io_reg K400_LCD_RES_7X4_8X6[] = { ++static struct io_reg K400_LCD_RES_7X4_8X6[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x1F}, {VIACR, CR55, 0x0F, 0x34}, + /*IGA2 Horizontal Blank End */ @@ -6746,10 +6725,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {VIACR, CR66, 0xFF, 0x78}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0xC4}, {VIASR, SR47, 0xFF, 0x59} +}; -+ +#define NUM_TOTAL_K400_LCD_RES_7X4_8X6 ARRAY_SIZE(K400_LCD_RES_7X4_8X6) + -+struct iga2_shadow_crtc_timing iga2_shadow_crtc_reg = { ++static struct iga2_shadow_crtc_timing iga2_shadow_crtc_reg = { + /* IGA2 Shadow Horizontal Total */ + {IGA2_SHADOW_HOR_TOTAL_REG_NUM, {{CR6D, 0, 7}, {CR71, 3, 3} } }, + /* IGA2 Shadow Horizontal Blank End */ @@ -6769,7 +6747,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {IGA2_SHADOW_VER_SYNC_END_REG_NUM, {{CR76, 0, 3} } } +}; + -+struct _lcd_scaling_factor lcd_scaling_factor = { ++static struct _lcd_scaling_factor lcd_scaling_factor = { + /* LCD Horizontal Scaling Factor Register */ + {LCD_HOR_SCALING_FACTOR_REG_NUM, + {{CR9F, 0, 1}, {CR77, 0, 7}, {CR79, 4, 5} } }, @@ -6777,14 +6755,49 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + {LCD_VER_SCALING_FACTOR_REG_NUM, + {{CR79, 3, 3}, {CR78, 0, 7}, {CR79, 6, 7} } } +}; -+struct _lcd_scaling_factor lcd_scaling_factor_CLE = { ++ ++static struct _lcd_scaling_factor lcd_scaling_factor_CLE = { + /* LCD Horizontal Scaling Factor Register */ + {LCD_HOR_SCALING_FACTOR_REG_NUM_CLE, {{CR77, 0, 7}, {CR79, 4, 5} } }, + /* LCD Vertical Scaling Factor Register */ + {LCD_VER_SCALING_FACTOR_REG_NUM_CLE, {{CR78, 0, 7}, {CR79, 6, 7} } } +}; + -+int check_lvds_chip(int device_id_subaddr, int device_id) ++#if 0 /* unused */ ++static void lvds_register_write(int index, u8 data) ++{ ++ u8 tmp; ++ ++ tmp = chip_info.chip_on_slot; ++ ++ chip_info.chip_on_slot = PORT_ON_AGP; ++ ++ i2cWriteByte(chip_info.lvds_chip_info.lvds_chip_slave_addr, index, ++ data); ++ ++ chip_info.chip_on_slot = tmp; ++ ++} ++#endif ++ ++static int lvds_register_read(int index) ++{ ++ u8 data; ++ int status; ++ u8 tmp; ++ ++ tmp = chip_info.chip_on_slot; ++ ++ chip_info.chip_on_slot = PORT_ON_AGP; ++ status = ++ i2cReadByte((u8) chip_info.lvds_chip_info.lvds_chip_slave_addr, ++ (u8) index, &data); ++ ++ chip_info.chip_on_slot = tmp; ++ return (data); ++} ++ ++static int check_lvds_chip(int device_id_subaddr, int device_id) +{ + if (lvds_register_read(device_id_subaddr) == device_id) + return (OK); @@ -6836,7 +6849,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + lvds_setting_info2.LCDDithering = lvds_setting_info.LCDDithering; +} + -+bool lvds_identify_integratedlvds(void) ++static bool lvds_identify_integratedlvds(void) +{ + if (display_hardware_layout == HW_LAYOUT_LCD_EXTERNAL_LCD2) { + /* Two dual channel LCD (Internal LVDS + External LVDS): */ @@ -7112,38 +7125,6 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + } +} + -+void lvds_register_write(int index, u8 data) -+{ -+ u8 tmp; -+ -+ tmp = chip_info.chip_on_slot; -+ -+ chip_info.chip_on_slot = PORT_ON_AGP; -+ -+ i2cWriteByte(chip_info.lvds_chip_info.lvds_chip_slave_addr, index, -+ data); -+ -+ chip_info.chip_on_slot = tmp; -+ -+} -+ -+int lvds_register_read(int index) -+{ -+ u8 data; -+ int status; -+ u8 tmp; -+ -+ tmp = chip_info.chip_on_slot; -+ -+ chip_info.chip_on_slot = PORT_ON_AGP; -+ status = -+ i2cReadByte((u8) chip_info.lvds_chip_info.lvds_chip_slave_addr, -+ (u8) index, &data); -+ -+ chip_info.chip_on_slot = tmp; -+ return (data); -+} -+ +void load_lcd_scaling(int set_hres, int set_vres, int panel_hres, + int panel_vres) +{ @@ -8468,7 +8449,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> +} --- /dev/null +++ b/drivers/video/viafb/lcd.h -@@ -0,0 +1,119 @@ +@@ -0,0 +1,118 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. @@ -8493,24 +8474,24 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> +#define __LCD_H__ + +/*Definition TMDS Device ID register*/ -+#define VT1631_DEVICE_ID_REG 0x02 -+#define VT1631_DEVICE_ID 0x92 ++#define VT1631_DEVICE_ID_REG 0x02 ++#define VT1631_DEVICE_ID 0x92 + -+#define VT3271_DEVICE_ID_REG 0x02 -+#define VT3271_DEVICE_ID 0x71 ++#define VT3271_DEVICE_ID_REG 0x02 ++#define VT3271_DEVICE_ID 0x71 + -+#define GET_LCD_SIZE_BY_SYSTEM_BIOS 0x01 -+#define GET_LCD_SIZE_BY_VGA_BIOS 0x02 -+#define GET_LCD_SZIE_BY_HW_STRAPPING 0x03 -+#define GET_LCD_SIZE_BY_USER_SETTING 0x04 ++#define GET_LCD_SIZE_BY_SYSTEM_BIOS 0x01 ++#define GET_LCD_SIZE_BY_VGA_BIOS 0x02 ++#define GET_LCD_SZIE_BY_HW_STRAPPING 0x03 ++#define GET_LCD_SIZE_BY_USER_SETTING 0x04 + +/* Definition DVI Panel ID*/ +/* Resolution: 640x480, Channel: single, Dithering: Enable */ -+#define LCD_PANEL_ID0_640X480 0x00 ++#define LCD_PANEL_ID0_640X480 0x00 +/* Resolution: 800x600, Channel: single, Dithering: Enable */ -+#define LCD_PANEL_ID1_800X600 0x01 ++#define LCD_PANEL_ID1_800X600 0x01 +/* Resolution: 1024x768, Channel: single, Dithering: Enable */ -+#define LCD_PANEL_ID2_1024X768 0x02 ++#define LCD_PANEL_ID2_1024X768 0x02 +/* Resolution: 1280x768, Channel: single, Dithering: Enable */ +#define LCD_PANEL_ID3_1280X768 0x03 +/* Resolution: 1280x1024, Channel: dual, Dithering: Enable */ @@ -8520,17 +8501,17 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> +/* Resolution: 1600x1200, Channel: dual, Dithering: Enable */ +#define LCD_PANEL_ID6_1600X1200 0x06 +/* Resolution: 1366x768, Channel: single, Dithering: Disable */ -+#define LCD_PANEL_ID7_1366X768 0x07 ++#define LCD_PANEL_ID7_1366X768 0x07 +/* Resolution: 1024x600, Channel: single, Dithering: Enable*/ -+#define LCD_PANEL_ID8_1024X600 0x08 ++#define LCD_PANEL_ID8_1024X600 0x08 +/* Resolution: 1280x800, Channel: single, Dithering: Enable*/ -+#define LCD_PANEL_ID9_1280X800 0x09 ++#define LCD_PANEL_ID9_1280X800 0x09 +/* Resolution: 800x480, Channel: single, Dithering: Enable*/ -+#define LCD_PANEL_IDA_800X480 0x0A ++#define LCD_PANEL_IDA_800X480 0x0A +/* Resolution: 1360x768, Channel: single, Dithering: Disable*/ -+#define LCD_PANEL_IDB_1360X768 0x0B ++#define LCD_PANEL_IDB_1360X768 0x0B +/* Resolution: 480x640, Channel: single, Dithering: Enable */ -+#define LCD_PANEL_IDC_480X640 0x0C ++#define LCD_PANEL_IDC_480X640 0x0C + + +extern int LCD2_ON; @@ -8544,7 +8525,6 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info); + -+int lvds_register_read(int index); +int fp_id_to_vindex(int panel_id); +void load_lcd_scaling(int set_hres, int set_vres, int panel_hres, + int panel_vres); @@ -8589,18 +8569,6 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + +#endif /* __LCD_H__ */ --- /dev/null -+++ b/drivers/video/viafb/Makefile -@@ -0,0 +1,9 @@ -+# -+# Makefile for the VIA framebuffer driver (for Linux Kernel 2.6) -+# -+ -+obj-$(CONFIG_FB_VIA) += viafb.o -+ -+viafb-y := viafbdev.o hw.o iface.o via_i2c.o dvi.o lcd.o ioctl.o accel.o via_utility.o vt1636.o global.o tblDPASetting.o viamode.o tbl1636.o -+ -+viafb-objs := $(viafb-y) ---- /dev/null +++ b/drivers/video/viafb/share.h @@ -0,0 +1,1113 @@ +/* @@ -9990,8 +9958,1747 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + +#endif --- /dev/null ++++ b/drivers/video/viafb/via_i2c.c +@@ -0,0 +1,469 @@ ++/* ++ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. ++ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. ++ ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published ++ * by the Free Software Foundation; either version 2, or (at your option) ++ * any later version. ++ ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even ++ * the implied warranty of MERCHANTABILITY or FITNESS FOR ++ * A PARTICULAR PURPOSE.See the GNU General Public License ++ * for more details. ++ ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., ++ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ */ ++ ++#include "global.h" ++ ++/* i2c delay for microsecond*/ ++void delays(int count) ++{ ++ u8 data; ++ while (count--) { ++ /* delay 1 us */ ++ data = inb(DELAYPORT); ++ data = inb(DELAYPORT); ++ data = inb(DELAYPORT); ++ data = inb(DELAYPORT); ++ data = inb(DELAYPORT); ++ } ++ ++} ++ ++/* Write I2C BUS SDA And SCL*/ ++void i2cWriteSdaScl(u8 sda, u8 scl) ++{ ++ u8 data; ++ u16 port_addr; ++ ++ if (chip_info.chip_on_slot == PORT_ON_AMR) { ++ ++ data = ((scl << 1) | sda) << 4; ++ /* enable I2C port */ ++ data = data | BIT0; ++ ++ port_addr = I2CPORT; ++ /* Write Register Value */ ++ write_reg(I2CPORTINDEX, port_addr, data); ++ } else { ++ if (chip_info.chip_on_slot == PORT_ON_AGP) { ++ data = ((scl << 1) | sda) << 4; ++ /* enable GPIO write port */ ++ data = data | (BIT6 + BIT7); ++ port_addr = GPIOPORT; ++ /* Write Register Value */ ++ write_reg(GPIOPORTINDEX, port_addr, data); ++ } ++ } ++} ++ ++void i2cWriteScl(u8 scl) ++{ ++ u8 data; ++ u16 port_addr; ++ ++ if (chip_info.chip_on_slot == PORT_ON_AMR) { ++ ++ data = (scl << 1) << 4; ++ /* enable I2C port */ ++ data = data | BIT0; ++ ++ port_addr = I2CPORT; ++ /* Write Register Value */ ++ write_reg(I2CPORTINDEX, port_addr, data); ++ } else { ++ if (chip_info.chip_on_slot == PORT_ON_AGP) { ++ data = (scl << 1) << 4; ++ /* enable GPIO write clock */ ++ data = data & 0xBF; ++ port_addr = GPIOPORT; ++ /* Write Register Value */ ++ write_reg(GPIOPORTINDEX, port_addr, data); ++ } ++ } ++} ++ ++void i2cReadSdaScl(u8 *pSda, u8 *pScl) ++{ ++ u8 data; ++ u16 port_addr; ++ ++ if (chip_info.chip_on_slot == PORT_ON_AMR) { ++ port_addr = I2CPORT; ++ data = read_reg(port_addr, I2CPORTINDEX); ++ *pSda = (data >> 2) & BIT0; /* get sda */ ++ *pScl = (data >> 3) & BIT0; /* get scl */ ++ } else { ++ if (chip_info.chip_on_slot == PORT_ON_AGP) { ++ port_addr = GPIOPORT; ++ data = read_reg(port_addr, GPIOPORTINDEX); ++ *pSda = (data >> 2) & BIT0; /* get sda */ ++ *pScl = (data >> 3) & BIT0; /* get scl */ ++ } ++ } ++} ++ ++void i2cWriteSdaSclDelay(u8 sda, u8 scl) ++{ ++ i2cWriteSdaScl(sda, scl); ++ delays(16); /* Wait 16 uS */ ++} ++ ++void i2cStartSignal(void) ++{ ++ i2cWriteSdaSclDelay(1, 1); ++ i2cWriteSdaSclDelay(0, 1); ++ i2cWriteSdaSclDelay(0, 0); ++} ++ ++void i2cStopSignal(void) ++{ ++ u8 data; ++ u16 port_addr; ++ ++ i2cWriteSdaSclDelay(0, 0); ++ i2cWriteSdaSclDelay(0, 1); ++ i2cWriteSdaSclDelay(1, 1); ++ ++ if (chip_info.chip_on_slot == PORT_ON_AGP) { ++ /* disable GPIO write port */ ++ data = 0x3c; ++ port_addr = GPIOPORT; ++ /* Write Register Value */ ++ write_reg(GPIOPORTINDEX, port_addr, data); ++ } ++ delays(2); ++ ++} ++ ++void disableSdaGPIO(void) ++{ ++ u8 data; ++ u16 port_addr; ++ ++ if (chip_info.chip_on_slot == PORT_ON_AGP) { ++ port_addr = GPIOPORT; ++ data = read_reg(port_addr, GPIOPORTINDEX); ++ /* disable GPIO write port */ ++ data = data & (~BIT6); ++ /* Write Register Value */ ++ write_reg(GPIOPORTINDEX, port_addr, data); ++ } ++} ++ ++void enableSdaGPIO(void) ++{ ++ u8 data; ++ u16 port_addr; ++ ++ if (chip_info.chip_on_slot == PORT_ON_AGP) { ++ port_addr = GPIOPORT; ++ data = read_reg(port_addr, GPIOPORTINDEX); ++ /* disable GPIO write port */ ++ data = data | (BIT6); ++ /* Write Register Value */ ++ write_reg(GPIOPORTINDEX, port_addr, data); ++ } ++} ++ ++void writeSclGPIO(u8 scl) ++{ ++ u8 data; ++ u16 port_addr; ++ ++ if (chip_info.chip_on_slot == PORT_ON_AGP) { ++ port_addr = GPIOPORT; ++ data = read_reg(port_addr, GPIOPORTINDEX); ++ data = data & (~BIT5); ++ /* write data to clock */ ++ data = (data | (scl << 5)) & (~BIT6); ++ /* Write Register Value */ ++ write_reg(GPIOPORTINDEX, port_addr, data); ++ } ++} ++ ++void writeSdaGPIO(u8 sda) ++{ ++ u8 data; ++ u16 port_addr; ++ ++ if (chip_info.chip_on_slot == PORT_ON_AGP) { ++ port_addr = GPIOPORT; ++ data = read_reg(port_addr, GPIOPORTINDEX); ++ ++ data = data & (~BIT4); ++ /* write data to clock */ ++ data = (data | (sda << 4)) & (~BIT7); ++ /* Write Register Value */ ++ write_reg(GPIOPORTINDEX, port_addr, data); ++ } ++} ++ ++void enableGPIO(void) ++{ ++ u8 data; ++ u16 port_addr; ++ ++ if (chip_info.chip_on_slot == PORT_ON_AGP) { ++ port_addr = GPIOPORT; ++ data = read_reg(port_addr, GPIOPORTINDEX); ++ /* enable GPIO write port */ ++ data = data | (BIT4 + BIT5 + BIT6 + BIT7); ++ /* Write Register Value */ ++ write_reg(GPIOPORTINDEX, port_addr, data); ++ } ++} ++ ++void releaseGPIO(void) ++{ ++ u8 data; ++ u16 port_addr; ++ ++ if (chip_info.chip_on_slot == PORT_ON_AGP) { ++ port_addr = GPIOPORT; ++ port_addr = port_addr + 1; ++ ++ data = read_reg(port_addr, GPIOPORTINDEX); ++ /* disable GPIO write port */ ++ data = data & 0x3c; ++ port_addr = GPIOPORT; ++ /* Write Register Value */ ++ write_reg(GPIOPORTINDEX, port_addr, data); ++ } ++} ++ ++int i2CWaitForSlave(void) ++{ ++ int time_out = 20000; ++ u8 sda, scl; ++ ++ while (time_out--) { ++ i2cReadSdaScl(&sda, &scl); ++ if (scl) ++ return (OK); /* Successful stall */ ++ delays(1); /* wait 1 uS */ ++ } ++ return (FAIL); /* Slave fail */ ++} ++ ++int i2cOutByte(u8 data) ++{ ++ u8 sda, scl; ++ u8 out_byte; ++ int bit_count = 8; ++ int status; ++ ++ out_byte = data; ++ while (bit_count--) { ++ sda = (out_byte >> 7) & 1; /* Load MSB */ ++ out_byte = out_byte << 1; /* next bit. */ ++ i2cWriteSdaSclDelay(sda, 0); ++ i2cWriteSdaSclDelay(sda, 1); ++ ++ status = i2CWaitForSlave(); ++ if (status == FAIL) ++ return (status); ++ i2cWriteSdaSclDelay(sda, 0); ++ ++ } ++ ++ if ((chip_info.chip_on_slot == PORT_ON_AGP)) { ++ ++ writeSclGPIO(0); ++ disableSdaGPIO(); ++ delays(2); ++ writeSclGPIO(1); ++ delays(2); ++ i2cReadSdaScl(&sda, &scl); ++ writeSclGPIO(0); ++ delays(2); ++ if (sda == 0) ++ status = OK; ++ else ++ status = FAIL; ++ ++ } else { ++ i2cWriteSdaSclDelay(1, 0); ++ i2cWriteSdaSclDelay(1, 1); ++ status = i2CWaitForSlave(); ++ if (status == FAIL) ++ return (status); ++ ++ i2cReadSdaScl(&sda, &scl); ++ if (sda == 0) { ++ i2cWriteSdaSclDelay(1, 0); ++ status = OK; ++ } else { ++ ++ i2cWriteSdaSclDelay(1, 0); ++ status = FAIL; ++ } ++ } ++ return (status); ++} ++ ++int i2cInputByte(u8 *pInByte, int ack) ++{ ++ ++ int bit_count = 8; ++ u8 sda, scl; ++ u8 data = 0; ++ int status; ++ ++ disableSdaGPIO(); ++ ++ while (bit_count--) { ++ if ((chip_info.chip_on_slot == PORT_ON_AGP)) { ++ ++ writeSclGPIO(1); ++ delays(2); ++ status = i2CWaitForSlave(); ++ if (status == FAIL) ++ return (FAIL); ++ i2cReadSdaScl(&sda, &scl); ++ data = data << 1; ++ data |= sda; ++ writeSclGPIO(0); ++ delays(2); ++ ++ } else { ++ i2cWriteSdaSclDelay(1, 1); ++ status = i2CWaitForSlave(); ++ if (status == FAIL) ++ return (FAIL); ++ i2cReadSdaScl(&sda, &scl); ++ data = data << 1; ++ data |= sda; ++ i2cWriteSdaSclDelay(1, 0); ++ } ++ } ++ *pInByte = data; ++ ++ if (ack) { ++ i2cWriteSdaSclDelay(0, 0); ++ i2cWriteSdaSclDelay(0, 1); ++ status = i2CWaitForSlave(); ++ if (status == FAIL) ++ return (status); ++ i2cWriteSdaSclDelay(0, 0); ++ } else { ++ i2cWriteSdaSclDelay(1, 0); ++ i2cWriteSdaSclDelay(1, 1); ++ status = i2CWaitForSlave(); ++ if (status == FAIL) ++ return (status); ++ } ++ i2cWriteSdaSclDelay(1, 0); ++ ++ return (OK); ++} ++ ++int i2cReadByte(u8 slave_addr, u8 index, u8 *pData) ++{ ++ ++ int status; ++ ++ i2cStartSignal(); ++ ++ status = i2cOutByte(slave_addr); ++ if (status == FAIL) { ++ i2cStopSignal(); ++ return (FAIL); ++ } ++ status = i2cOutByte(index); ++ ++ if (status == FAIL) { ++ i2cStopSignal(); ++ return (FAIL); ++ } ++ ++ i2cStartSignal(); ++ status = i2cOutByte(slave_addr | BIT0); ++ if (status == FAIL) { ++ i2cStopSignal(); ++ return (FAIL); ++ } ++ status = i2cInputByte(pData, 0); ++ if (status == FAIL) { ++ i2cStopSignal(); ++ return (FAIL); ++ } ++ ++ i2cStopSignal(); ++ return (OK); ++} ++ ++int i2cWriteByte(u8 slave_addr, u8 index, u8 data) ++{ ++ ++ int status; ++ ++ i2cStartSignal(); ++ status = i2cOutByte(slave_addr); ++ if (status == FAIL) { ++ i2cStopSignal(); ++ return (FAIL); ++ } ++ status = i2cOutByte(index); ++ if (status == FAIL) { ++ i2cStopSignal(); ++ return (FAIL); ++ } ++ status = i2cOutByte(data); ++ if (status == FAIL) { ++ i2cStopSignal(); ++ return (FAIL); ++ } ++ i2cStopSignal(); ++ return (OK); ++} ++ ++int i2cReadBytes(u8 slave_addr, u8 index, u8 *buff, int buff_len) ++{ ++ ++ int status, i; ++ ++ i2cStartSignal(); ++ ++ status = i2cOutByte(slave_addr); ++ if (status == FAIL) { ++ i2cStopSignal(); ++ return (FAIL); ++ } ++ ++ status = i2cOutByte(index); ++ if (status == FAIL) { ++ i2cStopSignal(); ++ return (FAIL); ++ } ++ ++ i2cStartSignal(); ++ status = i2cOutByte(slave_addr | BIT0); ++ if (status == FAIL) { ++ i2cStopSignal(); ++ return (FAIL); ++ } ++ ++ for (i = 0; i < buff_len; i++) { ++ if (buff_len == 1) ++ status = i2cInputByte(buff, 0); /* send NACK */ ++ else if (i < buff_len - 1) ++ status = i2cInputByte(buff, 1); /* send ACK */ ++ else ++ status = i2cInputByte(buff, 0); /* send NACK */ ++ if (status == FAIL) { ++ i2cStopSignal(); ++ return (FAIL); ++ } ++ buff++; ++ } ++ ++ i2cStopSignal(); ++ return (OK); ++} +--- /dev/null ++++ b/drivers/video/viafb/via_i2c.h +@@ -0,0 +1,51 @@ ++/* ++ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. ++ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. ++ ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published ++ * by the Free Software Foundation; either version 2, or (at your option) ++ * any later version. ++ ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even ++ * the implied warranty of MERCHANTABILITY or FITNESS FOR ++ * A PARTICULAR PURPOSE.See the GNU General Public License ++ * for more details. ++ ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., ++ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ */ ++#ifndef __VIA_I2C_H__ ++#define __VIA_I2C_H__ ++ ++#define I2CPORT 0x3c4 ++#define I2CPORTINDEX 0x31 ++#define GPIOPORT 0x3C4 ++#define GPIOPORTINDEX 0x2C ++#define I2C_BUS 1 ++#define GPIO_BUS 2 ++#define DELAYPORT 0x3C3 ++ ++void delays(int count); ++void i2cWriteSdaScl(u8 sda, u8 scl); ++void i2cWriteScl(u8 scl); ++void i2cReadSdaScl(u8 *pSda, u8 *pScl); ++void i2cWriteSdaSclDelay(u8 sda, u8 scl); ++void i2cStartSignal(void); ++void i2cStopSignal(void); ++void disableSdaGPIO(void); ++void enableSdaGPIO(void); ++void writeSclGPIO(u8 scl); ++void writeSdaGPIO(u8 sda); ++void enableGPIO(void); ++void releaseGPIO(void); ++int i2CWaitForSlave(void); ++int i2cOutByte(u8 data); ++int i2cInputByte(u8 *pInByte, int ack); ++int i2cReadByte(u8 slave_addr, u8 index, u8 *pData); ++int i2cWriteByte(u8 slave_addr, u8 index, u8 data); ++int i2cReadBytes(u8 slave_addr, u8 index, u8 *buff, int buff_len); ++#endif /* __VIA_I2C_H__ */ +--- /dev/null ++++ b/drivers/video/viafb/via_utility.c +@@ -0,0 +1,299 @@ ++/* ++ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. ++ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. ++ ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published ++ * by the Free Software Foundation; either version 2, or (at your option) ++ * any later version. ++ ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even ++ * the implied warranty of MERCHANTABILITY or FITNESS FOR ++ * A PARTICULAR PURPOSE.See the GNU General Public License ++ * for more details. ++ ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., ++ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ */ ++ ++#include "global.h" ++ ++void get_device_support_state(u32 *support_state) ++{ ++ *support_state = CRT_Device; ++ ++ if (chip_info.tmds_chip_info.tmds_chip_name == VT1632_TMDS) ++ *support_state |= DVI_Device; ++ ++ if (chip_info.lvds_chip_info.lvds_chip_name == VT1631_LVDS) ++ *support_state |= LCD_Device; ++} ++ ++void get_device_connect_state(u32 *connect_state) ++{ ++ bool mobile = FALSE; ++ ++ *connect_state = CRT_Device; ++ ++ if (dvi_sense()) ++ *connect_state |= DVI_Device; ++ ++ lcd_get_mobile_state(&mobile); ++ if (mobile) ++ *connect_state |= LCD_Device; ++} ++ ++bool lcd_get_support_expand_state(u32 xres, u32 yres) ++{ ++ unsigned int support_state = 0; ++ ++ switch (lcd_panel_id) { ++ case LCD_PANEL_ID0_640X480: ++ if ((xres < 640) && (yres < 480)) ++ support_state = TRUE; ++ break; ++ ++ case LCD_PANEL_ID1_800X600: ++ if ((xres < 800) && (yres < 600)) ++ support_state = TRUE; ++ break; ++ ++ case LCD_PANEL_ID2_1024X768: ++ if ((xres < 1024) && (yres < 768)) ++ support_state = TRUE; ++ break; ++ ++ case LCD_PANEL_ID3_1280X768: ++ if ((xres < 1280) && (yres < 768)) ++ support_state = TRUE; ++ break; ++ ++ case LCD_PANEL_ID4_1280X1024: ++ if ((xres < 1280) && (yres < 1024)) ++ support_state = TRUE; ++ break; ++ ++ case LCD_PANEL_ID5_1400X1050: ++ if ((xres < 1400) && (yres < 1050)) ++ support_state = TRUE; ++ break; ++ ++ case LCD_PANEL_ID6_1600X1200: ++ if ((xres < 1600) && (yres < 1200)) ++ support_state = TRUE; ++ break; ++ ++ case LCD_PANEL_ID7_1366X768: ++ if ((xres < 1366) && (yres < 768)) ++ support_state = TRUE; ++ break; ++ ++ case LCD_PANEL_ID8_1024X600: ++ if ((xres < 1024) && (yres < 600)) ++ support_state = TRUE; ++ break; ++ ++ case LCD_PANEL_ID9_1280X800: ++ if ((xres < 1280) && (yres < 800)) ++ support_state = TRUE; ++ break; ++ ++ case LCD_PANEL_IDA_800X480: ++ if ((xres < 800) && (yres < 480)) ++ support_state = TRUE; ++ break; ++ ++ case LCD_PANEL_IDB_1360X768: ++ if ((xres < 1360) && (yres < 768)) ++ support_state = TRUE; ++ break; ++ ++ case LCD_PANEL_IDC_480X640: ++ if ((xres < 480) && (yres < 640)) ++ support_state = TRUE; ++ break; ++ ++ default: ++ support_state = FALSE; ++ break; ++ } ++ ++ return support_state; ++} ++ ++/*====================================================================*/ ++/* Gamma Function Implementation*/ ++/*====================================================================*/ ++ ++void set_gamma_table(int bpp, unsigned int *gamma_table) ++{ ++ int i, sr1a; ++ int active_device_amount = 0; ++ int device_status = DeviceStatus; ++ unsigned char color_r[256]; ++ unsigned char color_g[256]; ++ unsigned char color_b[256]; ++ ++ for (i = 0; i < sizeof(DeviceStatus) * 8; i++) { ++ if (device_status & 1) ++ active_device_amount++; ++ device_status >>= 1; ++ } ++ ++ for (i = 0; i < 256; i++) { ++ color_r[i] = gamma_table[i] >> 16; ++ color_g[i] = (gamma_table[i] >> 8) & 0x00FF; ++ color_b[i] = gamma_table[i] & 0x000000FF; ++ } ++ ++ /* 8 bpp mode can't adjust gamma */ ++ if (!(bpp == 8)) { ++ /* Enable Gamma */ ++ switch (chip_info.gfx_chip_name) { ++ case UNICHROME_CLE266: ++ case UNICHROME_K400: ++ write_reg_mask(SR16, VIASR, 0x80, BIT7); ++ break; ++ ++ case UNICHROME_K800: ++ case UNICHROME_PM800: ++ case UNICHROME_CN700: ++ case UNICHROME_CX700: ++ case UNICHROME_K8M890: ++ case UNICHROME_P4M890: ++ case UNICHROME_P4M900: ++ write_reg_mask(CR33, VIACR, 0x80, BIT7); ++ break; ++ } ++ sr1a = (unsigned int)read_reg(VIASR, SR1A); ++ write_reg_mask(SR1A, VIASR, 0x0, BIT0); ++ ++ /* Fill IGA1 Gamma Table */ ++ outb(0, LUT_INDEX_WRITE); ++ for (i = 0; i < 256; i++) { ++ outb(color_r[i], LUT_DATA); ++ outb(color_g[i], LUT_DATA); ++ outb(color_b[i], LUT_DATA); ++ } ++ ++ /* If adjust Gamma value in SAMM, fill IGA1, ++ IGA2 Gamma table simultanous. */ ++ /* Switch to IGA2 Gamma Table */ ++ if ((active_device_amount > 1) && ++ !((chip_info.gfx_chip_name == UNICHROME_CLE266) && ++ (chip_info.gfx_chip_revision < 15))) { ++ write_reg_mask(SR1A, VIASR, 0x01, BIT0); ++ write_reg_mask(CR6A, VIACR, 0x02, BIT1); ++ ++ /* Fill IGA2 Gamma Table */ ++ outb(0, LUT_INDEX_WRITE); ++ for (i = 0; i < 256; i++) { ++ outb(color_r[i], LUT_DATA); ++ outb(color_g[i], LUT_DATA); ++ outb(color_b[i], LUT_DATA); ++ } ++ } ++ write_reg(SR1A, VIASR, sr1a); ++ } ++} ++ ++void get_gamma_table(unsigned int *gamma_table) ++{ ++ unsigned char color_r[256]; ++ unsigned char color_g[256]; ++ unsigned char color_b[256]; ++ unsigned char sr1a = 0; ++ int i; ++ ++ /* Enable Gamma */ ++ switch (chip_info.gfx_chip_name) { ++ case UNICHROME_CLE266: ++ case UNICHROME_K400: ++ write_reg_mask(SR16, VIASR, 0x80, BIT7); ++ break; ++ ++ case UNICHROME_K800: ++ case UNICHROME_PM800: ++ case UNICHROME_CN700: ++ case UNICHROME_CX700: ++ case UNICHROME_K8M890: ++ case UNICHROME_P4M890: ++ case UNICHROME_P4M900: ++ write_reg_mask(CR33, VIACR, 0x80, BIT7); ++ break; ++ } ++ sr1a = read_reg(VIASR, SR1A); ++ write_reg_mask(SR1A, VIASR, 0x0, BIT0); ++ ++ /* Reading gamma table to get color value */ ++ outb(0, LUT_INDEX_READ); ++ for (i = 0; i < 256; i++) { ++ color_r[i] = inb(LUT_DATA); ++ color_g[i] = inb(LUT_DATA); ++ color_b[i] = inb(LUT_DATA); ++ gamma_table[i] = ++ ((((u32) color_r[i]) << 16) | ++ (((u16) color_g[i]) << 8)) | color_b[i]; ++ } ++ write_reg(SR1A, VIASR, sr1a); ++} ++ ++void get_gamma_support_state(int bpp, unsigned int *support_state) ++{ ++ if (bpp == 8) ++ *support_state = None_Device; ++ else ++ *support_state = CRT_Device | DVI_Device | LCD_Device; ++} ++ ++int input_parameter_converter(int parameter_value) ++{ ++ int result; ++ ++ switch (parameter_value) { ++ case 1: ++ result = 0x01; ++ break; ++ ++ case 2: ++ result = 0x02; ++ break; ++ ++ case 3: ++ result = 0x04; ++ break; ++ ++ case 4: ++ result = 0x08; ++ break; ++ ++ case 5: ++ result = 0x10; ++ break; ++ ++ case 6: ++ result = 0x20; ++ break; ++ ++ case 7: ++ result = 0x40; ++ break; ++ ++ case 8: ++ result = 0x80; ++ break; ++ ++ case 9: ++ result = 0x100; ++ break; ++ ++ default: ++ result = 0x01; ++ break; ++ } ++ ++ return result; ++} +--- /dev/null ++++ b/drivers/video/viafb/via_utility.h +@@ -0,0 +1,35 @@ ++/* ++ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. ++ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. ++ ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published ++ * by the Free Software Foundation; either version 2, or (at your option) ++ * any later version. ++ ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even ++ * the implied warranty of MERCHANTABILITY or FITNESS FOR ++ * A PARTICULAR PURPOSE.See the GNU General Public License ++ * for more details. ++ ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., ++ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ */ ++#ifndef __VIAUTILITY_H__ ++#define __VIAUTILITY_H__ ++ ++/* These functions are used to get infomation about device's state */ ++void get_device_support_state(u32 *support_state); ++void get_device_connect_state(u32 *connect_state); ++bool lcd_get_support_expand_state(u32 xres, u32 yres); ++ ++/* These function are used to access gamma table */ ++void set_gamma_table(int bpp, unsigned int *gamma_table); ++void get_gamma_table(unsigned int *gamma_table); ++void get_gamma_support_state(int bpp, unsigned int *support_state); ++int input_parameter_converter(int parameter_value); ++ ++#endif /* __VIAUTILITY_H__ */ +--- /dev/null ++++ b/drivers/video/viafb/viafb.modes +@@ -0,0 +1,870 @@ ++# ++# ++# These data are based on the CRTC parameters in ++# ++# VIA Integration Graphics Chip ++# (C) 2004 VIA Technologies Inc. ++# ++ ++# ++# 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 640 480 ++# Scan Frequency 31.469 kHz 59.94 Hz ++# Sync Width 3.813 us 0.064 ms ++# 12 chars 2 lines ++# Front Porch 0.636 us 0.318 ms ++# 2 chars 10 lines ++# Back Porch 1.907 us 1.048 ms ++# 6 chars 33 lines ++# Active Time 25.422 us 15.253 ms ++# 80 chars 480 lines ++# Blank Time 6.356 us 1.430 ms ++# 20 chars 45 lines ++# Polarity negative negative ++# ++ ++mode "640x480-60" ++# D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz ++ geometry 640 480 640 480 32 ++ timings 39722 48 16 33 10 96 2 endmode mode "480x640-60" ++# D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz ++ geometry 480 640 480 640 32 timings 39722 72 24 19 1 48 3 endmode ++# ++# 640x480, 75 Hz, Non-Interlaced (31.50 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 640 480 ++# Scan Frequency 37.500 kHz 75.00 Hz ++# Sync Width 2.032 us 0.080 ms ++# 8 chars 3 lines ++# Front Porch 0.508 us 0.027 ms ++# 2 chars 1 lines ++# Back Porch 3.810 us 0.427 ms ++# 15 chars 16 lines ++# Active Time 20.317 us 12.800 ms ++# 80 chars 480 lines ++# Blank Time 6.349 us 0.533 ms ++# 25 chars 20 lines ++# Polarity negative negative ++# ++ mode "640x480-75" ++# D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz ++ geometry 640 480 640 480 32 timings 31747 120 16 16 1 64 3 endmode ++# ++# 640x480, 85 Hz, Non-Interlaced (36.000 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 640 480 ++# Scan Frequency 43.269 kHz 85.00 Hz ++# Sync Width 1.556 us 0.069 ms ++# 7 chars 3 lines ++# Front Porch 1.556 us 0.023 ms ++# 7 chars 1 lines ++# Back Porch 2.222 us 0.578 ms ++# 10 chars 25 lines ++# Active Time 17.778 us 11.093 ms ++# 80 chars 480 lines ++# Blank Time 5.333 us 0.670 ms ++# 24 chars 29 lines ++# Polarity negative negative ++# ++ mode "640x480-85" ++# D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz ++ geometry 640 480 640 480 32 timings 27777 80 56 25 1 56 3 endmode ++# ++# 640x480, 100 Hz, Non-Interlaced (43.163 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 640 480 ++# Scan Frequency 50.900 kHz 100.00 Hz ++# Sync Width 1.483 us 0.058 ms ++# 8 chars 3 lines ++# Front Porch 0.927 us 0.019 ms ++# 5 chars 1 lines ++# Back Porch 2.409 us 0.475 ms ++# 13 chars 25 lines ++# Active Time 14.827 us 9.430 ms ++# 80 chars 480 lines ++# Blank Time 4.819 us 0.570 ms ++# 26 chars 29 lines ++# Polarity positive positive ++# ++ mode "640x480-100" ++# D: 43.163 MHz, H: 50.900 kHz, V: 100.00 Hz ++ geometry 640 480 640 480 32 timings 23168 104 40 25 1 64 3 endmode ++# ++# 640x480, 120 Hz, Non-Interlaced (52.406 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 640 480 ++# Scan Frequency 61.800 kHz 120.00 Hz ++# Sync Width 1.221 us 0.048 ms ++# 8 chars 3 lines ++# Front Porch 0.763 us 0.016 ms ++# 5 chars 1 lines ++# Back Porch 1.984 us 0.496 ms ++# 13 chars 31 lines ++# Active Time 12.212 us 7.767 ms ++# 80 chars 480 lines ++# Blank Time 3.969 us 0.566 ms ++# 26 chars 35 lines ++# Polarity positive positive ++# ++ mode "640x480-120" ++# D: 52.406 MHz, H: 61.800 kHz, V: 120.00 Hz ++ geometry 640 480 640 480 32 timings 19081 104 40 31 1 64 3 endmode ++# ++# 720x480, 60 Hz, Non-Interlaced (26.880 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 720 480 ++# Scan Frequency 30.000 kHz 60.241 Hz ++# Sync Width 2.679 us 0.099 ms ++# 9 chars 3 lines ++# Front Porch 0.595 us 0.033 ms ++# 2 chars 1 lines ++# Back Porch 3.274 us 0.462 ms ++# 11 chars 14 lines ++# Active Time 26.786 us 16.000 ms ++# 90 chars 480 lines ++# Blank Time 6.548 us 0.600 ms ++# 22 chars 18 lines ++# Polarity positive positive ++# ++ mode "720x480-60" ++# D: 26.880 MHz, H: 30.000 kHz, V: 60.24 Hz ++ geometry 720 480 720 480 32 timings 37202 88 16 14 1 72 3 endmode ++# ++# 800x480, 60 Hz, Non-Interlaced (29.581 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 800 480 ++# Scan Frequency 29.892 kHz 60.00 Hz ++# Sync Width 2.704 us 100.604 us ++# 10 chars 3 lines ++# Front Porch 0.541 us 33.535 us ++# 2 chars 1 lines ++# Back Porch 3.245 us 435.949 us ++# 12 chars 13 lines ++# Active Time 27.044 us 16.097 ms ++# 100 chars 480 lines ++# Blank Time 6.491 us 0.570 ms ++# 24 chars 17 lines ++# Polarity positive positive ++# ++ mode "800x480-60" ++# D: 29.500 MHz, H: 29.738 kHz, V: 60.00 Hz ++ geometry 800 480 800 480 32 timings 33805 96 24 10 3 72 7 endmode ++# ++# 720x576, 60 Hz, Non-Interlaced (32.668 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 720 576 ++# Scan Frequency 35.820 kHz 60.00 Hz ++# Sync Width 2.204 us 0.083 ms ++# 9 chars 3 lines ++# Front Porch 0.735 us 0.027 ms ++# 3 chars 1 lines ++# Back Porch 2.939 us 0.459 ms ++# 12 chars 17 lines ++# Active Time 22.040 us 16.080 ms ++# 90 chars 476 lines ++# Blank Time 5.877 us 0.586 ms ++# 24 chars 21 lines ++# Polarity positive positive ++# ++ mode "720x576-60" ++# D: 32.668 MHz, H: 35.820 kHz, V: 60.00 Hz ++ geometry 720 576 720 576 32 timings 30611 96 24 17 1 72 3 endmode ++# ++# 800x600, 60 Hz, Non-Interlaced (40.00 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 800 600 ++# Scan Frequency 37.879 kHz 60.32 Hz ++# Sync Width 3.200 us 0.106 ms ++# 16 chars 4 lines ++# Front Porch 1.000 us 0.026 ms ++# 5 chars 1 lines ++# Back Porch 2.200 us 0.607 ms ++# 11 chars 23 lines ++# Active Time 20.000 us 15.840 ms ++# 100 chars 600 lines ++# Blank Time 6.400 us 0.739 ms ++# 32 chars 28 lines ++# Polarity positive positive ++# ++ mode "800x600-60" ++# D: 40.00 MHz, H: 37.879 kHz, V: 60.32 Hz ++ geometry 800 600 800 600 32 ++ timings 25000 88 40 23 1 128 4 hsync high vsync high endmode ++# ++# 800x600, 75 Hz, Non-Interlaced (49.50 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 800 600 ++# Scan Frequency 46.875 kHz 75.00 Hz ++# Sync Width 1.616 us 0.064 ms ++# 10 chars 3 lines ++# Front Porch 0.323 us 0.021 ms ++# 2 chars 1 lines ++# Back Porch 3.232 us 0.448 ms ++# 20 chars 21 lines ++# Active Time 16.162 us 12.800 ms ++# 100 chars 600 lines ++# Blank Time 5.172 us 0.533 ms ++# 32 chars 25 lines ++# Polarity positive positive ++# ++ mode "800x600-75" ++# D: 49.50 MHz, H: 46.875 kHz, V: 75.00 Hz ++ geometry 800 600 800 600 32 ++ timings 20203 160 16 21 1 80 3 hsync high vsync high endmode ++# ++# 800x600, 85 Hz, Non-Interlaced (56.25 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 800 600 ++# Scan Frequency 53.674 kHz 85.061 Hz ++# Sync Width 1.138 us 0.056 ms ++# 8 chars 3 lines ++# Front Porch 0.569 us 0.019 ms ++# 4 chars 1 lines ++# Back Porch 2.702 us 0.503 ms ++# 19 chars 27 lines ++# Active Time 14.222 us 11.179 ms ++# 100 chars 600 lines ++# Blank Time 4.409 us 0.578 ms ++# 31 chars 31 lines ++# Polarity positive positive ++# ++ mode "800x600-85" ++# D: 56.25 MHz, H: 53.674 kHz, V: 85.061 Hz ++ geometry 800 600 800 600 32 ++ timings 17777 152 32 27 1 64 3 hsync high vsync high endmode ++# ++# 800x600, 100 Hz, Non-Interlaced (67.50 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 800 600 ++# Scan Frequency 62.500 kHz 100.00 Hz ++# Sync Width 0.948 us 0.064 ms ++# 8 chars 4 lines ++# Front Porch 0.000 us 0.112 ms ++# 0 chars 7 lines ++# Back Porch 3.200 us 0.224 ms ++# 27 chars 14 lines ++# Active Time 11.852 us 9.600 ms ++# 100 chars 600 lines ++# Blank Time 4.148 us 0.400 ms ++# 35 chars 25 lines ++# Polarity positive positive ++# ++ mode "800x600-100" ++# D: 67.50 MHz, H: 62.500 kHz, V: 100.00 Hz ++ geometry 800 600 800 600 32 ++ timings 14667 216 0 14 7 64 4 hsync high vsync high endmode ++# ++# 800x600, 120 Hz, Non-Interlaced (83.950 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 800 600 ++# Scan Frequency 77.160 kHz 120.00 Hz ++# Sync Width 1.048 us 0.039 ms ++# 11 chars 3 lines ++# Front Porch 0.667 us 0.013 ms ++# 7 chars 1 lines ++# Back Porch 1.715 us 0.507 ms ++# 18 chars 39 lines ++# Active Time 9.529 us 7.776 ms ++# 100 chars 600 lines ++# Blank Time 3.431 us 0.557 ms ++# 36 chars 43 lines ++# Polarity positive positive ++# ++ mode "800x600-120" ++# D: 83.950 MHz, H: 77.160 kHz, V: 120.00 Hz ++ geometry 800 600 800 600 32 ++ timings 11912 144 56 39 1 88 3 hsync high vsync high endmode ++# ++# 848x480, 60 Hz, Non-Interlaced (31.490 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 848 480 ++# Scan Frequency 29.820 kHz 60.00 Hz ++# Sync Width 2.795 us 0.099 ms ++# 11 chars 3 lines ++# Front Porch 0.508 us 0.033 ms ++# 2 chars 1 lines ++# Back Porch 3.303 us 0.429 ms ++# 13 chars 13 lines ++# Active Time 26.929 us 16.097 ms ++# 106 chars 480 lines ++# Blank Time 6.605 us 0.570 ms ++# 26 chars 17 lines ++# Polarity positive positive ++# ++ mode "848x480-60" ++# D: 31.500 MHz, H: 29.830 kHz, V: 60.00 Hz ++ geometry 848 480 848 480 32 ++ timings 31746 104 24 12 3 80 5 hsync high vsync high endmode ++# ++# 856x480, 60 Hz, Non-Interlaced (31.728 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 856 480 ++# Scan Frequency 29.820 kHz 60.00 Hz ++# Sync Width 2.774 us 0.099 ms ++# 11 chars 3 lines ++# Front Porch 0.504 us 0.033 ms ++# 2 chars 1 lines ++# Back Porch 3.728 us 0.429 ms ++# 13 chars 13 lines ++# Active Time 26.979 us 16.097 ms ++# 107 chars 480 lines ++# Blank Time 6.556 us 0.570 ms ++# 26 chars 17 lines ++# Polarity positive positive ++# ++ mode "856x480-60" ++# D: 31.728 MHz, H: 29.820 kHz, V: 60.00 Hz ++ geometry 856 480 856 480 32 ++ timings 31518 104 16 13 1 88 3 ++ hsync high vsync high endmode mode "960x600-60" ++# D: 45.250 MHz, H: 37.212 kHz, V: 60.00 Hz ++ geometry 960 600 960 600 32 timings 22099 128 32 15 3 96 6 endmode ++# ++# 1000x600, 60 Hz, Non-Interlaced (48.068 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1000 600 ++# Scan Frequency 37.320 kHz 60.00 Hz ++# Sync Width 2.164 us 0.080 ms ++# 13 chars 3 lines ++# Front Porch 0.832 us 0.027 ms ++# 5 chars 1 lines ++# Back Porch 2.996 us 0.483 ms ++# 18 chars 18 lines ++# Active Time 20.804 us 16.077 ms ++# 125 chars 600 lines ++# Blank Time 5.991 us 0.589 ms ++# 36 chars 22 lines ++# Polarity negative positive ++# ++ mode "1000x600-60" ++# D: 48.068 MHz, H: 37.320 kHz, V: 60.00 Hz ++ geometry 1000 600 1000 600 32 ++ timings 20834 144 40 18 1 104 3 endmode mode "1024x576-60" ++# D: 46.996 MHz, H: 35.820 kHz, V: 60.00 Hz ++ geometry 1024 576 1024 576 32 ++ timings 21278 144 40 17 1 104 3 endmode mode "1024x600-60" ++# D: 48.964 MHz, H: 37.320 kHz, V: 60.00 Hz ++ geometry 1024 600 1024 600 32 ++ timings 20461 144 40 18 1 104 3 endmode mode "1088x612-60" ++# D: 52.952 MHz, H: 38.040 kHz, V: 60.00 Hz ++ geometry 1088 612 1088 612 32 timings 18877 152 48 16 3 104 5 endmode ++# ++# 1024x512, 60 Hz, Non-Interlaced (41.291 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1024 512 ++# Scan Frequency 31.860 kHz 60.00 Hz ++# Sync Width 2.519 us 0.094 ms ++# 13 chars 3 lines ++# Front Porch 0.775 us 0.031 ms ++# 4 chars 1 lines ++# Back Porch 3.294 us 0.465 ms ++# 17 chars 15 lines ++# Active Time 24.800 us 16.070 ms ++# 128 chars 512 lines ++# Blank Time 6.587 us 0.596 ms ++# 34 chars 19 lines ++# Polarity positive positive ++# ++ mode "1024x512-60" ++# D: 41.291 MHz, H: 31.860 kHz, V: 60.00 Hz ++ geometry 1024 512 1024 512 32 ++ timings 24218 126 32 15 1 104 3 hsync high vsync high endmode ++# ++# 1024x600, 60 Hz, Non-Interlaced (48.875 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1024 768 ++# Scan Frequency 37.252 kHz 60.00 Hz ++# Sync Width 2.128 us 80.532us ++# 13 chars 3 lines ++# Front Porch 0.818 us 26.844 us ++# 5 chars 1 lines ++# Back Porch 2.946 us 483.192 us ++# 18 chars 18 lines ++# Active Time 20.951 us 16.697 ms ++# 128 chars 622 lines ++# Blank Time 5.893 us 0.591 ms ++# 36 chars 22 lines ++# Polarity negative positive ++# ++#mode "1024x600-60" ++# # D: 48.875 MHz, H: 37.252 kHz, V: 60.00 Hz ++# geometry 1024 600 1024 600 32 ++# timings 20460 144 40 18 1 104 3 ++# endmode ++# ++# 1024x768, 60 Hz, Non-Interlaced (65.00 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1024 768 ++# Scan Frequency 48.363 kHz 60.00 Hz ++# Sync Width 2.092 us 0.124 ms ++# 17 chars 6 lines ++# Front Porch 0.369 us 0.062 ms ++# 3 chars 3 lines ++# Back Porch 2.462 us 0.601 ms ++# 20 chars 29 lines ++# Active Time 15.754 us 15.880 ms ++# 128 chars 768 lines ++# Blank Time 4.923 us 0.786 ms ++# 40 chars 38 lines ++# Polarity negative negative ++# ++ mode "1024x768-60" ++# D: 65.00 MHz, H: 48.363 kHz, V: 60.00 Hz ++ geometry 1024 768 1024 768 32 timings 15385 160 24 29 3 136 6 endmode ++# ++# 1024x768, 75 Hz, Non-Interlaced (78.75 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1024 768 ++# Scan Frequency 60.023 kHz 75.03 Hz ++# Sync Width 1.219 us 0.050 ms ++# 12 chars 3 lines ++# Front Porch 0.203 us 0.017 ms ++# 2 chars 1 lines ++# Back Porch 2.235 us 0.466 ms ++# 22 chars 28 lines ++# Active Time 13.003 us 12.795 ms ++# 128 chars 768 lines ++# Blank Time 3.657 us 0.533 ms ++# 36 chars 32 lines ++# Polarity positive positive ++# ++ mode "1024x768-75" ++# D: 78.75 MHz, H: 60.023 kHz, V: 75.03 Hz ++ geometry 1024 768 1024 768 32 ++ timings 12699 176 16 28 1 96 3 hsync high vsync high endmode ++# ++# 1024x768, 85 Hz, Non-Interlaced (94.50 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1024 768 ++# Scan Frequency 68.677 kHz 85.00 Hz ++# Sync Width 1.016 us 0.044 ms ++# 12 chars 3 lines ++# Front Porch 0.508 us 0.015 ms ++# 6 chars 1 lines ++# Back Porch 2.201 us 0.524 ms ++# 26 chars 36 lines ++# Active Time 10.836 us 11.183 ms ++# 128 chars 768 lines ++# Blank Time 3.725 us 0.582 ms ++# 44 chars 40 lines ++# Polarity positive positive ++# ++ mode "1024x768-85" ++# D: 94.50 MHz, H: 68.677 kHz, V: 85.00 Hz ++ geometry 1024 768 1024 768 32 ++ timings 10582 208 48 36 1 96 3 hsync high vsync high endmode ++# ++# 1024x768, 100 Hz, Non-Interlaced (110.0 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1024 768 ++# Scan Frequency 79.023 kHz 99.78 Hz ++# Sync Width 0.800 us 0.101 ms ++# 11 chars 8 lines ++# Front Porch 0.000 us 0.000 ms ++# 0 chars 0 lines ++# Back Porch 2.545 us 0.202 ms ++# 35 chars 16 lines ++# Active Time 9.309 us 9.719 ms ++# 128 chars 768 lines ++# Blank Time 3.345 us 0.304 ms ++# 46 chars 24 lines ++# Polarity negative negative ++# ++ mode "1024x768-100" ++# D: 113.3 MHz, H: 79.023 kHz, V: 99.78 Hz ++ geometry 1024 768 1024 768 32 ++ timings 8825 280 0 16 0 88 8 endmode mode "1152x720-60" ++# D: 66.750 MHz, H: 44.859 kHz, V: 60.00 Hz ++ geometry 1152 720 1152 720 32 timings 14981 168 56 19 3 112 6 endmode ++# ++# 1152x864, 75 Hz, Non-Interlaced (110.0 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1152 864 ++# Scan Frequency 75.137 kHz 74.99 Hz ++# Sync Width 1.309 us 0.106 ms ++# 18 chars 8 lines ++# Front Porch 0.245 us 0.599 ms ++# 3 chars 45 lines ++# Back Porch 1.282 us 1.132 ms ++# 18 chars 85 lines ++# Active Time 10.473 us 11.499 ms ++# 144 chars 864 lines ++# Blank Time 2.836 us 1.837 ms ++# 39 chars 138 lines ++# Polarity positive positive ++# ++ mode "1152x864-75" ++# D: 110.0 MHz, H: 75.137 kHz, V: 74.99 Hz ++ geometry 1152 864 1152 864 32 ++ timings 9259 144 24 85 45 144 8 ++ hsync high vsync high endmode mode "1200x720-60" ++# D: 70.184 MHz, H: 44.760 kHz, V: 60.00 Hz ++ geometry 1200 720 1200 720 32 ++ timings 14253 184 28 22 1 128 3 endmode mode "1280x600-60" ++# D: 61.503 MHz, H: 37.320 kHz, V: 60.00 Hz ++ geometry 1280 600 1280 600 32 ++ timings 16260 184 28 18 1 128 3 endmode mode "1280x720-50" ++# D: 60.466 MHz, H: 37.050 kHz, V: 50.00 Hz ++ geometry 1280 720 1280 720 32 ++ timings 16538 176 48 17 1 128 3 endmode mode "1280x768-50" ++# D: 65.178 MHz, H: 39.550 kHz, V: 50.00 Hz ++ geometry 1280 768 1280 768 32 timings 15342 184 28 19 1 128 3 endmode ++# ++# 1280x768, 60 Hz, Non-Interlaced (80.136 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1280 768 ++# Scan Frequency 47.700 kHz 60.00 Hz ++# Sync Width 1.697 us 0.063 ms ++# 17 chars 3 lines ++# Front Porch 0.799 us 0.021 ms ++# 8 chars 1 lines ++# Back Porch 2.496 us 0.483 ms ++# 25 chars 23 lines ++# Active Time 15.973 us 16.101 ms ++# 160 chars 768 lines ++# Blank Time 4.992 us 0.566 ms ++# 50 chars 27 lines ++# Polarity positive positive ++# ++ mode "1280x768-60" ++# D: 80.13 MHz, H: 47.700 kHz, V: 60.00 Hz ++ geometry 1280 768 1280 768 32 ++ timings 12480 200 48 23 1 126 3 hsync high vsync high endmode ++# ++# 1280x800, 60 Hz, Non-Interlaced (83.375 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1280 800 ++# Scan Frequency 49.628 kHz 60.00 Hz ++# Sync Width 1.631 us 60.450 us ++# 17 chars 3 lines ++# Front Porch 0.768 us 20.15 us ++# 8 chars 1 lines ++# Back Porch 2.399 us 0.483 ms ++# 25 chars 24 lines ++# Active Time 15.352 us 16.120 ms ++# 160 chars 800 lines ++# Blank Time 4.798 us 0.564 ms ++# 50 chars 28 lines ++# Polarity negtive positive ++# ++ mode "1280x800-60" ++# D: 83.500 MHz, H: 49.702 kHz, V: 60.00 Hz ++ geometry 1280 800 1280 800 32 timings 11994 200 72 22 3 128 6 endmode ++# ++# 1280x960, 60 Hz, Non-Interlaced (108.00 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1280 960 ++# Scan Frequency 60.000 kHz 60.00 Hz ++# Sync Width 1.037 us 0.050 ms ++# 14 chars 3 lines ++# Front Porch 0.889 us 0.017 ms ++# 12 chars 1 lines ++# Back Porch 2.889 us 0.600 ms ++# 39 chars 36 lines ++# Active Time 11.852 us 16.000 ms ++# 160 chars 960 lines ++# Blank Time 4.815 us 0.667 ms ++# 65 chars 40 lines ++# Polarity positive positive ++# ++ mode "1280x960-60" ++# D: 108.00 MHz, H: 60.000 kHz, V: 60.00 Hz ++ geometry 1280 960 1280 960 32 ++ timings 9259 312 96 36 1 112 3 hsync high vsync high endmode ++# ++# 1280x1024, 60 Hz, Non-Interlaced (108.00 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1280 1024 ++# Scan Frequency 63.981 kHz 60.02 Hz ++# Sync Width 1.037 us 0.047 ms ++# 14 chars 3 lines ++# Front Porch 0.444 us 0.015 ms ++# 6 chars 1 lines ++# Back Porch 2.297 us 0.594 ms ++# 31 chars 38 lines ++# Active Time 11.852 us 16.005 ms ++# 160 chars 1024 lines ++# Blank Time 3.778 us 0.656 ms ++# 51 chars 42 lines ++# Polarity positive positive ++# ++ mode "1280x1024-60" ++# D: 108.00 MHz, H: 63.981 kHz, V: 60.02 Hz ++ geometry 1280 1024 1280 1024 32 ++ timings 9260 248 48 38 1 112 3 hsync high vsync high endmode ++# ++# 1280x1024, 75 Hz, Non-Interlaced (135.00 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1280 1024 ++# Scan Frequency 79.976 kHz 75.02 Hz ++# Sync Width 1.067 us 0.038 ms ++# 18 chars 3 lines ++# Front Porch 0.119 us 0.012 ms ++# 2 chars 1 lines ++# Back Porch 1.837 us 0.475 ms ++# 31 chars 38 lines ++# Active Time 9.481 us 12.804 ms ++# 160 chars 1024 lines ++# Blank Time 3.022 us 0.525 ms ++# 51 chars 42 lines ++# Polarity positive positive ++# ++ mode "1280x1024-75" ++# D: 135.00 MHz, H: 79.976 kHz, V: 75.02 Hz ++ geometry 1280 1024 1280 1024 32 ++ timings 7408 248 16 38 1 144 3 hsync high vsync high endmode ++# ++# 1280x1024, 85 Hz, Non-Interlaced (157.50 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1280 1024 ++# Scan Frequency 91.146 kHz 85.02 Hz ++# Sync Width 1.016 us 0.033 ms ++# 20 chars 3 lines ++# Front Porch 0.406 us 0.011 ms ++# 8 chars 1 lines ++# Back Porch 1.422 us 0.483 ms ++# 28 chars 44 lines ++# Active Time 8.127 us 11.235 ms ++# 160 chars 1024 lines ++# Blank Time 2.844 us 0.527 ms ++# 56 chars 48 lines ++# Polarity positive positive ++# ++ mode "1280x1024-85" ++# D: 157.50 MHz, H: 91.146 kHz, V: 85.02 Hz ++ geometry 1280 1024 1280 1024 32 ++ timings 6349 224 64 44 1 160 3 ++ hsync high vsync high endmode mode "1440x900-60" ++# D: 106.500 MHz, H: 55.935 kHz, V: 60.00 Hz ++ geometry 1440 900 1440 900 32 ++ timings 9390 232 80 25 3 152 6 ++ hsync high vsync high endmode mode "1440x900-75" ++# D: 136.750 MHz, H: 70.635 kHz, V: 75.00 Hz ++ geometry 1440 900 1440 900 32 ++ timings 7315 248 96 33 3 152 6 hsync high vsync high endmode ++# ++# 1440x1050, 60 Hz, Non-Interlaced (125.10 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1440 1050 ++# Scan Frequency 65.220 kHz 60.00 Hz ++# Sync Width 1.204 us 0.046 ms ++# 19 chars 3 lines ++# Front Porch 0.760 us 0.015 ms ++# 12 chars 1 lines ++# Back Porch 1.964 us 0.495 ms ++# 31 chars 33 lines ++# Active Time 11.405 us 16.099 ms ++# 180 chars 1050 lines ++# Blank Time 3.928 us 0.567 ms ++# 62 chars 37 lines ++# Polarity positive positive ++# ++ mode "1440x1050-60" ++# D: 125.10 MHz, H: 65.220 kHz, V: 60.00 Hz ++ geometry 1440 1050 1440 1050 32 ++ timings 7993 248 96 33 1 152 3 ++ hsync high vsync high endmode mode "1600x900-60" ++# D: 118.250 MHz, H: 55.990 kHz, V: 60.00 Hz ++ geometry 1600 900 1600 900 32 ++ timings 8415 256 88 26 3 168 5 endmode mode "1600x1024-60" ++# D: 136.358 MHz, H: 63.600 kHz, V: 60.00 Hz ++ geometry 1600 1024 1600 1024 32 timings 7315 272 104 32 1 168 3 endmode ++# ++# 1600x1200, 60 Hz, Non-Interlaced (156.00 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1600 1200 ++# Scan Frequency 76.200 kHz 60.00 Hz ++# Sync Width 1.026 us 0.105 ms ++# 20 chars 8 lines ++# Front Porch 0.205 us 0.131 ms ++# 4 chars 10 lines ++# Back Porch 1.636 us 0.682 ms ++# 32 chars 52 lines ++# Active Time 10.256 us 15.748 ms ++# 200 chars 1200 lines ++# Blank Time 2.872 us 0.866 ms ++# 56 chars 66 lines ++# Polarity negative negative ++# ++ mode "1600x1200-60" ++# D: 156.00 MHz, H: 76.200 kHz, V: 60.00 Hz ++ geometry 1600 1200 1600 1200 32 timings 6172 256 32 52 10 160 8 endmode ++# ++# 1600x1200, 75 Hz, Non-Interlaced (202.50 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1600 1200 ++# Scan Frequency 93.750 kHz 75.00 Hz ++# Sync Width 0.948 us 0.032 ms ++# 24 chars 3 lines ++# Front Porch 0.316 us 0.011 ms ++# 8 chars 1 lines ++# Back Porch 1.501 us 0.491 ms ++# 38 chars 46 lines ++# Active Time 7.901 us 12.800 ms ++# 200 chars 1200 lines ++# Blank Time 2.765 us 0.533 ms ++# 70 chars 50 lines ++# Polarity positive positive ++# ++ mode "1600x1200-75" ++# D: 202.50 MHz, H: 93.750 kHz, V: 75.00 Hz ++ geometry 1600 1200 1600 1200 32 ++ timings 4938 304 64 46 1 192 3 ++ hsync high vsync high endmode mode "1680x1050-60" ++# D: 146.250 MHz, H: 65.290 kHz, V: 59.954 Hz ++ geometry 1680 1050 1680 1050 32 ++ timings 6814 280 104 30 3 176 6 ++ hsync high vsync high endmode mode "1680x1050-75" ++# D: 187.000 MHz, H: 82.306 kHz, V: 74.892 Hz ++ geometry 1680 1050 1680 1050 32 ++ timings 5348 296 120 40 3 176 6 ++ hsync high vsync high endmode mode "1792x1344-60" ++# D: 202.975 MHz, H: 83.460 kHz, V: 60.00 Hz ++ geometry 1792 1344 1792 1344 32 ++ timings 4902 320 128 43 1 192 3 ++ hsync high vsync high endmode mode "1856x1392-60" ++# D: 218.571 MHz, H: 86.460 kHz, V: 60.00 Hz ++ geometry 1856 1392 1856 1392 32 ++ timings 4577 336 136 45 1 200 3 ++ hsync high vsync high endmode mode "1920x1200-60" ++# D: 193.250 MHz, H: 74.556 kHz, V: 60.00 Hz ++ geometry 1920 1200 1920 1200 32 ++ timings 5173 336 136 36 3 200 6 ++ hsync high vsync high endmode mode "1920x1440-60" ++# D: 234.000 MHz, H:90.000 kHz, V: 60.00 Hz ++ geometry 1920 1440 1920 1440 32 ++ timings 4274 344 128 56 1 208 3 ++ hsync high vsync high endmode mode "1920x1440-75" ++# D: 297.000 MHz, H:112.500 kHz, V: 75.00 Hz ++ geometry 1920 1440 1920 1440 32 ++ timings 3367 352 144 56 1 224 3 ++ hsync high vsync high endmode mode "2048x1536-60" ++# D: 267.250 MHz, H: 95.446 kHz, V: 60.00 Hz ++ geometry 2048 1536 2048 1536 32 ++ timings 3742 376 152 49 3 224 4 hsync high vsync high endmode ++# ++# 1280x720, 60 Hz, Non-Interlaced (74.481 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1280 720 ++# Scan Frequency 44.760 kHz 60.00 Hz ++# Sync Width 1.826 us 67.024 ms ++# 17 chars 3 lines ++# Front Porch 0.752 us 22.341 ms ++# 7 chars 1 lines ++# Back Porch 2.578 us 491.510 ms ++# 24 chars 22 lines ++# Active Time 17.186 us 16.086 ms ++# 160 chars 720 lines ++# Blank Time 5.156 us 0.581 ms ++# 48 chars 26 lines ++# Polarity negative negative ++# ++ mode "1280x720-60" ++# D: 74.481 MHz, H: 44.760 kHz, V: 60.00 Hz ++ geometry 1280 720 1280 720 32 timings 13426 192 64 22 1 136 3 endmode ++# ++# 1920x1080, 60 Hz, Non-Interlaced (172.798 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1920 1080 ++# Scan Frequency 67.080 kHz 60.00 Hz ++# Sync Width 1.204 us 44.723 ms ++# 26 chars 3 lines ++# Front Porch 0.694 us 14.908 ms ++# 15 chars 1 lines ++# Back Porch 1.898 us 506.857 ms ++# 41 chars 34 lines ++# Active Time 11.111 us 16.100 ms ++# 240 chars 1080 lines ++# Blank Time 3.796 us 0.566 ms ++# 82 chars 38 lines ++# Polarity negative negative ++# ++ mode "1920x1080-60" ++# D: 74.481 MHz, H: 67.080 kHz, V: 60.00 Hz ++ geometry 1920 1080 1920 1080 32 timings 5787 328 120 34 1 208 3 endmode ++# ++# 1400x1050, 60 Hz, Non-Interlaced (122.61 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1400 1050 ++# Scan Frequency 65.218 kHz 59.99 Hz ++# Sync Width 1.037 us 0.047 ms ++# 19 chars 3 lines ++# Front Porch 0.444 us 0.015 ms ++# 11 chars 1 lines ++# Back Porch 1.185 us 0.188 ms ++# 30 chars 33 lines ++# Active Time 12.963 us 16.411 ms ++# 175 chars 1050 lines ++# Blank Time 2.667 us 0.250 ms ++# 60 chars 37 lines ++# Polarity negative positive ++# ++ mode "1400x1050-60" ++# D: 122.750 MHz, H: 65.317 kHz, V: 59.99 Hz ++ geometry 1400 1050 1408 1050 32 ++ timings 8214 232 88 32 3 144 4 endmode mode "1400x1050-75" ++# D: 156.000 MHz, H: 82.278 kHz, V: 74.867 Hz ++ geometry 1400 1050 1408 1050 32 timings 6410 248 104 42 3 144 4 endmode ++# ++# 1366x768, 60 Hz, Non-Interlaced (85.86 MHz dotclock) ++# ++# Horizontal Vertical ++# Resolution 1366 768 ++# Scan Frequency 47.700 kHz 60.00 Hz ++# Sync Width 1.677 us 0.063 ms ++# 18 chars 3 lines ++# Front Porch 0.839 us 0.021 ms ++# 9 chars 1 lines ++# Back Porch 2.516 us 0.482 ms ++# 27 chars 23 lines ++# Active Time 15.933 us 16.101 ms ++# 171 chars 768 lines ++# Blank Time 5.031 us 0.566 ms ++# 54 chars 27 lines ++# Polarity negative positive ++# ++ mode "1360x768-60" ++# D: 84.750 MHz, H: 47.720 kHz, V: 60.00 Hz ++ geometry 1360 768 1360 768 32 ++ timings 11799 208 72 22 3 136 5 endmode mode "1366x768-60" ++# D: 85.86 MHz, H: 47.700 kHz, V: 60.00 Hz ++ geometry 1366 768 1366 768 32 ++ timings 11647 216 72 23 1 144 3 endmode mode "1366x768-50" ++# D: 69,924 MHz, H: 39.550 kHz, V: 50.00 Hz ++ geometry 1366 768 1366 768 32 timings 14301 200 56 19 1 144 3 endmode +--- /dev/null +++ b/drivers/video/viafb/viafbdev.c -@@ -0,0 +1,2775 @@ +@@ -0,0 +1,2780 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. @@ -10030,27 +11737,31 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> +static char *mode1 = "640x480"; +static int resMode = VIA_RES_640X480; + -+int video_on_crt; -+int video_on_dvi; -+int video_on_lcd; ++static int video_on_crt; ++static int video_on_dvi; ++static int video_on_lcd; + +/* Added for specifying active devices.*/ -+char *active_dev = ""; ++static char *active_dev = ""; + +/* Added for specifying video on devices.*/ -+char *video_dev = ""; ++static char *video_dev = ""; + +/*Added for specify lcd output port*/ -+char *lcd_port = ""; -+char *dvi_port = ""; ++static char *lcd_port = ""; ++static char *dvi_port = ""; + +/* Display Mode Information */ -+int refresh1 = 60; ++static int refresh1 = 60; +static int timer_on; -+struct timer_list timer_for3D; ++static struct timer_list timer_for3D; ++ ++static unsigned int second_virtual_yres; ++ + +static struct fb_ops viafb_ops; -+void init_global_var(void) ++ ++static void init_global_var(void) +{ + second_virtual_yres = 0; + second_virtual_xres = 0; @@ -10070,7 +11781,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + timer_on = 0; +} + -+void get_panel_max_scal_size(struct _panel_size_pos_info *p_max_size) ++static void get_panel_max_scal_size(struct _panel_size_pos_info *p_max_size) +{ + switch (p_max_size->device_type) { + case DVI_Device: @@ -10080,7 +11791,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + p_max_size->x = p_max_size->y = 0; + } +} -+void get_panel_max_scal_pos(struct _panel_size_pos_info *p_para) ++static void get_panel_max_scal_pos(struct _panel_size_pos_info *p_para) +{ + switch (p_para->device_type) { + case DVI_Device: @@ -10091,7 +11802,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + } +} + -+void get_panel_scal_pos(struct _panel_size_pos_info *p_para) ++static void get_panel_scal_pos(struct _panel_size_pos_info *p_para) +{ + switch (p_para->device_type) { + case DVI_Device: @@ -10101,7 +11812,8 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + p_para->x = p_para->y = 0; + } +} -+void get_panel_scal_size(struct _panel_size_pos_info *p_para) ++ ++static void get_panel_scal_size(struct _panel_size_pos_info *p_para) +{ + switch (p_para->device_type) { + case DVI_Device: @@ -10112,7 +11824,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + } +} + -+void set_panel_scal_pos(struct _panel_size_pos_info *p_para) ++static void set_panel_scal_pos(struct _panel_size_pos_info *p_para) +{ + switch (p_para->device_type) { + case DVI_Device: @@ -10122,7 +11834,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + } +} + -+void set_panel_scal_size(struct _panel_size_pos_info *p_para) ++static void set_panel_scal_size(struct _panel_size_pos_info *p_para) +{ + switch (p_para->device_type) { + case DVI_Device: @@ -10611,6 +12323,337 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + return 0; +} + ++static void check_available_device_to_enable(int device_id) ++{ ++ int device_num = 0; ++ ++ /* Initialize: */ ++ CRT_ON = STATE_OFF; ++ DVI_ON = STATE_OFF; ++ LCD_ON = STATE_OFF; ++ LCD2_ON = STATE_OFF; ++ DeviceStatus = None_Device; ++ ++ if ((device_id & CRT_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) { ++ CRT_ON = STATE_ON; ++ device_num++; ++ DeviceStatus |= CRT_Device; ++ } ++ ++ if ((device_id & DVI_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) { ++ DVI_ON = STATE_ON; ++ device_num++; ++ DeviceStatus |= DVI_Device; ++ } ++ ++ if ((device_id & LCD_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) { ++ LCD_ON = STATE_ON; ++ device_num++; ++ DeviceStatus |= LCD_Device; ++ } ++ ++ if ((device_id & LCD2_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) { ++ LCD2_ON = STATE_ON; ++ device_num++; ++ DeviceStatus |= LCD2_Device; ++ } ++ ++ if (DeviceStatus == None_Device) { ++ /* Use CRT as default active device: */ ++ CRT_ON = STATE_ON; ++ DeviceStatus = CRT_Device; ++ } ++ DEBUG_MSG(KERN_INFO "Device Status:%x", DeviceStatus); ++} ++ ++static void apply_second_mode_setting(struct fb_var_screeninfo *sec_var) ++{ ++ if ((sec_var->xres_virtual * (sec_var->bits_per_pixel >> 3)) & 0x1F) { ++ /*Is 32 bytes alignment? */ ++ /*32 pixel alignment */ ++ sec_var->xres_virtual = (sec_var->xres_virtual + 31) & ~31; ++ } ++ second_xres = sec_var->xres; ++ second_yres = sec_var->yres; ++ second_virtual_xres = sec_var->xres_virtual; ++ second_virtual_yres = sec_var->yres_virtual; ++ via_fb_bpp1 = sec_var->bits_per_pixel; ++ refresh1 = get_refresh(sec_var->xres, sec_var->yres, sec_var->pixclock); ++} ++ ++static void viafb_set_video_device(u32 video_dev_info) ++{ ++ video_on_crt = STATE_OFF; ++ video_on_dvi = STATE_OFF; ++ video_on_lcd = STATE_OFF; ++ ++ /* Check available device to enable: */ ++ if ((video_dev_info & CRT_Device) == CRT_Device) { ++ video_on_crt = STATE_ON; ++ } else if ((video_dev_info & DVI_Device) == DVI_Device) { ++ video_on_dvi = STATE_ON; ++ } else if ((video_dev_info & LCD_Device) == LCD_Device) { ++ video_on_lcd = STATE_ON; ++ } ++} ++ ++static void viafb_get_video_device(u32 *video_dev_info) ++{ ++ *video_dev_info = None_Device; ++ if (video_on_crt == STATE_ON) { ++ *video_dev_info |= CRT_Device; ++ } else if (video_on_dvi == STATE_ON) { ++ *video_dev_info |= DVI_Device; ++ } else if (video_on_lcd == STATE_ON) { ++ *video_dev_info |= LCD_Device; ++ } ++} ++ ++static void viafb_set_device(struct device_t active_device) ++{ ++ /* Check available device to enable: */ ++ int device_id = None_Device; ++ if (active_device.crt) ++ device_id |= CRT_Device; ++ if (active_device.dvi) ++ device_id |= DVI_Device; ++ if (active_device.lcd) ++ device_id |= LCD_Device; ++ ++ check_available_device_to_enable(device_id); ++ ++ /* Check property of LCD: */ ++ if (LCD_ON) { ++ if (active_device.lcd_dsp_cent) { ++ lvds_setting_info.display_method = lcd_dsp_method = ++ LCD_CENTERING; ++ } else { ++ lvds_setting_info.display_method = lcd_dsp_method = ++ LCD_EXPANDSION; ++ } ++ ++ if (active_device.lcd_mode == LCD_SPWG) { ++ lvds_setting_info.lcd_mode = lcd_mode = LCD_SPWG; ++ } else { ++ lvds_setting_info.lcd_mode = lcd_mode = LCD_OPENLDI; ++ } ++ ++ if (active_device.lcd_panel_id <= LCD_PANEL_ID_MAXIMUM) { ++ lcd_panel_id = active_device.lcd_panel_id; ++ init_lcd_size(); ++ } ++ } ++ ++ /* Check property of mode: */ ++ if (!active_device.xres1) { ++ second_xres = 640; ++ } else { ++ second_xres = active_device.xres1; ++ } ++ ++ if (!active_device.yres1) { ++ second_yres = 480; ++ } else { ++ second_yres = active_device.yres1; ++ } ++ if (active_device.bpp != 0) ++ via_fb_bpp = active_device.bpp; ++ if (active_device.bpp1 != 0) ++ via_fb_bpp1 = active_device.bpp1; ++ if (active_device.refresh != 0) ++ refresh = active_device.refresh; ++ if (active_device.refresh1 != 0) ++ refresh1 = active_device.refresh1; ++ if ((active_device.samm == STATE_OFF) ++ || (active_device.samm == STATE_ON)) ++ SAMM_ON = active_device.samm; ++ primary_dev = active_device.primary_dev; ++ ++ set_start_addr(); ++ set_iga_path(); ++} ++ ++/* ++* S.T.Chen [2006.01.17]: ++* Purpose: to get the current primary display device type. ++* Return: an integer which indicates the current primary device type. ++*/ ++static int get_primary_device(void) ++{ ++ int primary_device = 0; ++ /* Rule: device on iga1 path are the primary device. */ ++ if (SAMM_ON) { ++ if (CRT_ON) { ++ if (crt_setting_info.iga_path == IGA1) { ++ DEBUG_MSG(KERN_INFO "CRT IGA Path:%d\n", ++ crt_setting_info.iga_path); ++ primary_device = CRT_Device; ++ } ++ } ++ if (DVI_ON) { ++ if (tmds_setting_info.iga_path == IGA1) { ++ DEBUG_MSG(KERN_INFO "DVI IGA Path:%d\n", ++ tmds_setting_info.iga_path); ++ primary_device = DVI_Device; ++ } ++ } ++ if (LCD_ON) { ++ if (lvds_setting_info.iga_path == IGA1) { ++ DEBUG_MSG(KERN_INFO "LCD IGA Path:%d\n", ++ lvds_setting_info.iga_path); ++ primary_device = LCD_Device; ++ } ++ } ++ if (LCD2_ON) { ++ if (lvds_setting_info2.iga_path == IGA1) { ++ DEBUG_MSG(KERN_INFO "LCD2 IGA Path:%d\n", ++ lvds_setting_info2.iga_path); ++ primary_device = LCD2_Device; ++ } ++ } ++ } ++ return primary_device; ++} ++ ++static u8 is_duoview(void) ++{ ++ if (0 == SAMM_ON) { ++ if (LCD_ON + LCD2_ON + DVI_ON + CRT_ON == 2) ++ return TRUE; ++ return FALSE; ++ } else { ++ return FALSE; ++ } ++} ++ ++static int apply_device_setting(struct viafb_ioctl_setting setting_info, ++ struct fb_info *info) ++{ ++ int need_set_mode = 0; ++ DEBUG_MSG(KERN_INFO "apply_device_setting\n"); ++ ++ if (setting_info.device_flag) { ++ need_set_mode = 1; ++ check_available_device_to_enable(setting_info.device_status); ++ } ++ ++ /* Unlock LCD's operation according to LCD flag ++ and check if the setting value is valid. */ ++ /* If the value is valid, apply the new setting value to the device. */ ++ if (LCD_ON) { ++ if (setting_info.lcd_operation_flag & OP_LCD_CENTERING) { ++ need_set_mode = 1; ++ if (setting_info.lcd_attributes.display_center) { ++ /* Centering */ ++ lvds_setting_info.display_method = ++ LCD_CENTERING; ++ lcd_dsp_method = LCD_CENTERING; ++ lvds_setting_info2.display_method = ++ lcd_dsp_method = LCD_CENTERING; ++ } else { ++ /* expandsion */ ++ lvds_setting_info.display_method = ++ LCD_EXPANDSION; ++ lcd_dsp_method = LCD_EXPANDSION; ++ lvds_setting_info2.display_method = ++ LCD_EXPANDSION; ++ lcd_dsp_method = LCD_EXPANDSION; ++ } ++ } ++ ++ if (setting_info.lcd_operation_flag & OP_LCD_MODE) { ++ need_set_mode = 1; ++ if (setting_info.lcd_attributes.lcd_mode == LCD_SPWG) { ++ lvds_setting_info.lcd_mode = lcd_mode = ++ LCD_SPWG; ++ } else { ++ lvds_setting_info.lcd_mode = lcd_mode = ++ LCD_OPENLDI; ++ } ++ lvds_setting_info2.lcd_mode = ++ lvds_setting_info.lcd_mode; ++ } ++ ++ if (setting_info.lcd_operation_flag & OP_LCD_PANEL_ID) { ++ need_set_mode = 1; ++ if (setting_info.lcd_attributes.panel_id <= ++ LCD_PANEL_ID_MAXIMUM) { ++ lcd_panel_id = ++ setting_info.lcd_attributes.panel_id; ++ init_lcd_size(); ++ } ++ } ++ } ++ ++ if (0 != (setting_info.samm_status & OP_SAMM)) { ++ setting_info.samm_status = ++ setting_info.samm_status & (~OP_SAMM); ++ if (setting_info.samm_status == 0 ++ || setting_info.samm_status == 1) { ++ SAMM_ON = setting_info.samm_status; ++ ++ if (SAMM_ON) ++ primary_dev = setting_info.primary_device; ++ ++ set_start_addr(); ++ set_iga_path(); ++ } ++ need_set_mode = 1; ++ } ++ ++ parinfo.duoview = is_duoview(); ++ ++ if (!need_set_mode) { ++ ; ++ } else { ++ set_iga_path(); ++ viafb_set_par(info); ++ } ++ return (TRUE); ++} ++ ++static void retrieve_device_setting(struct viafb_ioctl_setting *setting_info) ++{ ++ ++ /* get device status */ ++ if (CRT_ON == 1) ++ setting_info->device_status = CRT_Device; ++ if (DVI_ON == 1) ++ setting_info->device_status |= DVI_Device; ++ if (LCD_ON == 1) ++ setting_info->device_status |= LCD_Device; ++ if (LCD2_ON == 1) ++ setting_info->device_status |= LCD2_Device; ++ if ((video_on_crt == 1) && (CRT_ON == 1)) ++ setting_info->video_device_status = crt_setting_info.iga_path; ++ else if ((video_on_dvi == 1) && (DVI_ON == 1)) ++ setting_info->video_device_status = tmds_setting_info.iga_path; ++ else if ((video_on_lcd == 1) && (LCD_ON == 1)) ++ setting_info->video_device_status = lvds_setting_info.iga_path; ++ else ++ setting_info->video_device_status = 0; ++ ++ setting_info->samm_status = SAMM_ON; ++ setting_info->primary_device = get_primary_device(); ++ ++ setting_info->first_dev_bpp = via_fb_bpp; ++ setting_info->second_dev_bpp = via_fb_bpp1; ++ ++ setting_info->first_dev_refresh = refresh; ++ setting_info->second_dev_refresh = refresh1; ++ ++ setting_info->first_dev_hor_res = via_fb_hotplug_Xres; ++ setting_info->first_dev_ver_res = via_fb_hotplug_Yres; ++ setting_info->second_dev_hor_res = second_xres; ++ setting_info->second_dev_ver_res = second_yres; ++ ++ /* Get lcd attributes */ ++ setting_info->lcd_attributes.display_center = lcd_dsp_method; ++ setting_info->lcd_attributes.panel_id = lcd_panel_id; ++ setting_info->lcd_attributes.lcd_mode = lcd_mode; ++} ++ ++ +static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg) +{ + struct viafb_ioctl_info viainfo; @@ -10627,9 +12670,9 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + u32 gpu32 = 0, ss; + u32 video_dev_info = 0; + struct viafb_ioctl_setting viafb_setting; -+ struct device_t active_dev; -+ ss = sizeof(active_dev); -+ memset(&active_dev, 0, ss); ++ struct device_t active_device; ++ ss = sizeof(active_device); ++ memset(&active_device, 0, ss); + memset(&viafb_setting, 0, sizeof(viafb_setting)); + + DEBUG_MSG(KERN_INFO "viafb_ioctl: 0x%X !!\n", cmd); @@ -10674,7 +12717,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + viamode.refresh_sec = 0; + viamode.bpp_sec = 0; + } -+ if (copy_to_user((void __user *)arg, &viamode, sizeof(viamode))) ++ if (copy_to_user(argp, &viamode, sizeof(viamode))) + return -EFAULT; + break; + case VIAFB_GET_SAMM_INFO: @@ -10708,7 +12751,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + viasamm.offset_sec = 0; + } + -+ if (copy_to_user((void __user *)arg, &viasamm, sizeof(viasamm))) ++ if (copy_to_user(argp, &viasamm, sizeof(viasamm))) + return -EFAULT; + + break; @@ -10733,38 +12776,38 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + lcd_disable(); + break; + case VIAFB_SET_DEVICE: -+ if (copy_from_user(&active_dev, (void *)argp, ss)) ++ if (copy_from_user(&active_device, argp, ss)) + return -EFAULT; -+ viafb_set_device(active_dev); ++ viafb_set_device(active_device); + viafb_set_par(info); + break; + case VIAFB_GET_DEVICE: -+ active_dev.crt = CRT_ON; -+ active_dev.dvi = DVI_ON; -+ active_dev.lcd = LCD_ON; -+ active_dev.samm = SAMM_ON; -+ active_dev.primary_dev = primary_dev; ++ active_device.crt = CRT_ON; ++ active_device.dvi = DVI_ON; ++ active_device.lcd = LCD_ON; ++ active_device.samm = SAMM_ON; ++ active_device.primary_dev = primary_dev; + -+ active_dev.lcd_dsp_cent = lcd_dsp_method; -+ active_dev.lcd_panel_id = lcd_panel_id; -+ active_dev.lcd_mode = lcd_mode; ++ active_device.lcd_dsp_cent = lcd_dsp_method; ++ active_device.lcd_panel_id = lcd_panel_id; ++ active_device.lcd_mode = lcd_mode; + -+ active_dev.xres = via_fb_hotplug_Xres; -+ active_dev.yres = via_fb_hotplug_Yres; ++ active_device.xres = via_fb_hotplug_Xres; ++ active_device.yres = via_fb_hotplug_Yres; + -+ active_dev.xres1 = second_xres; -+ active_dev.yres1 = second_yres; ++ active_device.xres1 = second_xres; ++ active_device.yres1 = second_yres; + -+ active_dev.bpp = via_fb_bpp; -+ active_dev.bpp1 = via_fb_bpp1; -+ active_dev.refresh = refresh; -+ active_dev.refresh1 = refresh1; ++ active_device.bpp = via_fb_bpp; ++ active_device.bpp1 = via_fb_bpp1; ++ active_device.refresh = refresh; ++ active_device.refresh1 = refresh1; + -+ active_dev.epia_dvi = platform_epia_dvi; -+ active_dev.lcd_dual_edge = device_lcd_dualedge; -+ active_dev.bus_width = via_bus_width; ++ active_device.epia_dvi = platform_epia_dvi; ++ active_device.lcd_dual_edge = device_lcd_dualedge; ++ active_device.bus_width = via_bus_width; + -+ if (copy_to_user((void __user *)arg, &active_dev, ss)) ++ if (copy_to_user((void __user *)arg, &active_device, ss)) + return -EFAULT; + break; + @@ -10782,8 +12825,8 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + break; + + case VIAFB_SET_DEVICE_INFO: -+ if (copy_from_user -+ (&viafb_setting, (void *)argp, sizeof(viafb_setting))) ++ if (copy_from_user (&viafb_setting, argp, ++ sizeof(viafb_setting))) + return -EFAULT; + if (apply_device_setting(viafb_setting, info) < 0) + return -EINVAL; @@ -10791,13 +12834,12 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + break; + + case VIAFB_SET_SECOND_MODE: -+ if (copy_from_user(&sec_var, (void *)argp, sizeof(sec_var))) ++ if (copy_from_user(&sec_var, argp, sizeof(sec_var))) + return -EFAULT; + apply_second_mode_setting(&sec_var); + break; + + case VIAFB_GET_DEVICE_INFO: -+ + retrieve_device_setting(&viafb_setting); + + if (copy_to_user @@ -11280,8 +13322,8 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + } + } + -+ memcpy(((struct viafb_par *)(info->par))->fbmem_virt + -+ ((struct viafb_par *)(info->par))->cursor_start, ++ memcpy((void *)(((struct viafb_par *)(info->par))->fbmem_virt + ++ ((struct viafb_par *)(info->par))->cursor_start), + data_bak, CURSOR_SIZE); + } + @@ -11568,336 +13610,6 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + return (resMode); +} + -+static void check_available_device_to_enable(int device_id) -+{ -+ int device_num = 0; -+ -+ /* Initialize: */ -+ CRT_ON = STATE_OFF; -+ DVI_ON = STATE_OFF; -+ LCD_ON = STATE_OFF; -+ LCD2_ON = STATE_OFF; -+ DeviceStatus = None_Device; -+ -+ if ((device_id & CRT_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) { -+ CRT_ON = STATE_ON; -+ device_num++; -+ DeviceStatus |= CRT_Device; -+ } -+ -+ if ((device_id & DVI_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) { -+ DVI_ON = STATE_ON; -+ device_num++; -+ DeviceStatus |= DVI_Device; -+ } -+ -+ if ((device_id & LCD_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) { -+ LCD_ON = STATE_ON; -+ device_num++; -+ DeviceStatus |= LCD_Device; -+ } -+ -+ if ((device_id & LCD2_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) { -+ LCD2_ON = STATE_ON; -+ device_num++; -+ DeviceStatus |= LCD2_Device; -+ } -+ -+ if (DeviceStatus == None_Device) { -+ /* Use CRT as default active device: */ -+ CRT_ON = STATE_ON; -+ DeviceStatus = CRT_Device; -+ } -+ DEBUG_MSG(KERN_INFO "Device Status:%x", DeviceStatus); -+} -+ -+void viafb_set_device(struct device_t active_dev) -+{ -+ /* Check available device to enable: */ -+ int device_id = None_Device; -+ if (active_dev.crt) -+ device_id |= CRT_Device; -+ if (active_dev.dvi) -+ device_id |= DVI_Device; -+ if (active_dev.lcd) -+ device_id |= LCD_Device; -+ -+ check_available_device_to_enable(device_id); -+ -+ /* Check property of LCD: */ -+ if (LCD_ON) { -+ if (active_dev.lcd_dsp_cent) { -+ lvds_setting_info.display_method = lcd_dsp_method = -+ LCD_CENTERING; -+ } else { -+ lvds_setting_info.display_method = lcd_dsp_method = -+ LCD_EXPANDSION; -+ } -+ -+ if (active_dev.lcd_mode == LCD_SPWG) { -+ lvds_setting_info.lcd_mode = lcd_mode = LCD_SPWG; -+ } else { -+ lvds_setting_info.lcd_mode = lcd_mode = LCD_OPENLDI; -+ } -+ -+ if (active_dev.lcd_panel_id <= LCD_PANEL_ID_MAXIMUM) { -+ lcd_panel_id = active_dev.lcd_panel_id; -+ init_lcd_size(); -+ } -+ } -+ -+ /* Check property of mode: */ -+ if (!active_dev.xres1) { -+ second_xres = 640; -+ } else { -+ second_xres = active_dev.xres1; -+ } -+ -+ if (!active_dev.yres1) { -+ second_yres = 480; -+ } else { -+ second_yres = active_dev.yres1; -+ } -+ if (active_dev.bpp != 0) -+ via_fb_bpp = active_dev.bpp; -+ if (active_dev.bpp1 != 0) -+ via_fb_bpp1 = active_dev.bpp1; -+ if (active_dev.refresh != 0) -+ refresh = active_dev.refresh; -+ if (active_dev.refresh1 != 0) -+ refresh1 = active_dev.refresh1; -+ if ((active_dev.samm == STATE_OFF) -+ || (active_dev.samm == STATE_ON)) -+ SAMM_ON = active_dev.samm; -+ primary_dev = active_dev.primary_dev; -+ -+ set_start_addr(); -+ set_iga_path(); -+} -+ -+void viafb_set_video_device(u32 video_dev_info) -+{ -+ video_on_crt = STATE_OFF; -+ video_on_dvi = STATE_OFF; -+ video_on_lcd = STATE_OFF; -+ -+ /* Check available device to enable: */ -+ if ((video_dev_info & CRT_Device) == CRT_Device) { -+ video_on_crt = STATE_ON; -+ } else if ((video_dev_info & DVI_Device) == DVI_Device) { -+ video_on_dvi = STATE_ON; -+ } else if ((video_dev_info & LCD_Device) == LCD_Device) { -+ video_on_lcd = STATE_ON; -+ } -+} -+void viafb_get_video_device(u32 *video_dev_info) -+{ -+ *video_dev_info = None_Device; -+ if (video_on_crt == STATE_ON) { -+ *video_dev_info |= CRT_Device; -+ } else if (video_on_dvi == STATE_ON) { -+ *video_dev_info |= DVI_Device; -+ } else if (video_on_lcd == STATE_ON) { -+ *video_dev_info |= LCD_Device; -+ } -+} -+ -+/* -+* S.T.Chen [2006.01.17]: -+* Purpose: to get the current primary display device type. -+* Return: an integer which indicates the current primary device type. -+*/ -+int get_primary_device() -+{ -+ int primary_device = 0; -+ /* Rule: device on iga1 path are the primary device. */ -+ if (SAMM_ON) { -+ if (CRT_ON) { -+ if (crt_setting_info.iga_path == IGA1) { -+ DEBUG_MSG(KERN_INFO "CRT IGA Path:%d\n", -+ crt_setting_info.iga_path); -+ primary_device = CRT_Device; -+ } -+ } -+ if (DVI_ON) { -+ if (tmds_setting_info.iga_path == IGA1) { -+ DEBUG_MSG(KERN_INFO "DVI IGA Path:%d\n", -+ tmds_setting_info.iga_path); -+ primary_device = DVI_Device; -+ } -+ } -+ if (LCD_ON) { -+ if (lvds_setting_info.iga_path == IGA1) { -+ DEBUG_MSG(KERN_INFO "LCD IGA Path:%d\n", -+ lvds_setting_info.iga_path); -+ primary_device = LCD_Device; -+ } -+ } -+ if (LCD2_ON) { -+ if (lvds_setting_info2.iga_path == IGA1) { -+ DEBUG_MSG(KERN_INFO "LCD2 IGA Path:%d\n", -+ lvds_setting_info2.iga_path); -+ primary_device = LCD2_Device; -+ } -+ } -+ } -+ return primary_device; -+} -+ -+static u8 is_duoview(void) -+{ -+ if (0 == SAMM_ON) { -+ if (LCD_ON + LCD2_ON + DVI_ON + CRT_ON == 2) -+ return TRUE; -+ return FALSE; -+ } else { -+ return FALSE; -+ } -+} -+ -+void apply_second_mode_setting(struct fb_var_screeninfo *sec_var) -+{ -+ if ((sec_var->xres_virtual * (sec_var->bits_per_pixel >> 3)) & 0x1F) { -+ /*Is 32 bytes alignment? */ -+ /*32 pixel alignment */ -+ sec_var->xres_virtual = (sec_var->xres_virtual + 31) & ~31; -+ } -+ second_xres = sec_var->xres; -+ second_yres = sec_var->yres; -+ second_virtual_xres = sec_var->xres_virtual; -+ second_virtual_yres = sec_var->yres_virtual; -+ via_fb_bpp1 = sec_var->bits_per_pixel; -+ refresh1 = get_refresh(sec_var->xres, sec_var->yres, sec_var->pixclock); -+} -+ -+int apply_device_setting(struct viafb_ioctl_setting setting_info, -+ struct fb_info *info) -+{ -+ int need_set_mode = 0; -+ DEBUG_MSG(KERN_INFO "apply_device_setting\n"); -+ -+ if (setting_info.device_flag) { -+ need_set_mode = 1; -+ check_available_device_to_enable(setting_info.device_status); -+ } -+ -+ /* Unlock LCD's operation according to LCD flag -+ and check if the setting value is valid. */ -+ /* If the value is valid, apply the new setting value to the device. */ -+ if (LCD_ON) { -+ if (setting_info.lcd_operation_flag & OP_LCD_CENTERING) { -+ need_set_mode = 1; -+ if (setting_info.lcd_attributes.display_center) { -+ /* Centering */ -+ lvds_setting_info.display_method = -+ LCD_CENTERING; -+ lcd_dsp_method = LCD_CENTERING; -+ lvds_setting_info2.display_method = -+ lcd_dsp_method = LCD_CENTERING; -+ } else { -+ /* expandsion */ -+ lvds_setting_info.display_method = -+ LCD_EXPANDSION; -+ lcd_dsp_method = LCD_EXPANDSION; -+ lvds_setting_info2.display_method = -+ LCD_EXPANDSION; -+ lcd_dsp_method = LCD_EXPANDSION; -+ } -+ } -+ -+ if (setting_info.lcd_operation_flag & OP_LCD_MODE) { -+ need_set_mode = 1; -+ if (setting_info.lcd_attributes.lcd_mode == LCD_SPWG) { -+ lvds_setting_info.lcd_mode = lcd_mode = -+ LCD_SPWG; -+ } else { -+ lvds_setting_info.lcd_mode = lcd_mode = -+ LCD_OPENLDI; -+ } -+ lvds_setting_info2.lcd_mode = -+ lvds_setting_info.lcd_mode; -+ } -+ -+ if (setting_info.lcd_operation_flag & OP_LCD_PANEL_ID) { -+ need_set_mode = 1; -+ if (setting_info.lcd_attributes.panel_id <= -+ LCD_PANEL_ID_MAXIMUM) { -+ lcd_panel_id = -+ setting_info.lcd_attributes.panel_id; -+ init_lcd_size(); -+ } -+ } -+ } -+ -+ if (0 != (setting_info.samm_status & OP_SAMM)) { -+ setting_info.samm_status = -+ setting_info.samm_status & (~OP_SAMM); -+ if (setting_info.samm_status == 0 -+ || setting_info.samm_status == 1) { -+ SAMM_ON = setting_info.samm_status; -+ -+ if (SAMM_ON) -+ primary_dev = setting_info.primary_device; -+ -+ set_start_addr(); -+ set_iga_path(); -+ } -+ need_set_mode = 1; -+ } -+ -+ parinfo.duoview = is_duoview(); -+ -+ if (!need_set_mode) { -+ ; -+ } else { -+ set_iga_path(); -+ viafb_set_par(info); -+ } -+ return (TRUE); -+} -+ -+void retrieve_device_setting(struct viafb_ioctl_setting *setting_info) -+{ -+ -+ /* get device status */ -+ if (CRT_ON == 1) -+ setting_info->device_status = CRT_Device; -+ if (DVI_ON == 1) -+ setting_info->device_status |= DVI_Device; -+ if (LCD_ON == 1) -+ setting_info->device_status |= LCD_Device; -+ if (LCD2_ON == 1) -+ setting_info->device_status |= LCD2_Device; -+ if ((video_on_crt == 1) && (CRT_ON == 1)) { -+ setting_info->video_device_status = crt_setting_info.iga_path; -+ } else if ((video_on_dvi == 1) && (DVI_ON == 1)) { -+ setting_info->video_device_status = tmds_setting_info.iga_path; -+ } else if ((video_on_lcd == 1) && (LCD_ON == 1)) { -+ setting_info->video_device_status = lvds_setting_info.iga_path; -+ } else { -+ setting_info->video_device_status = 0; -+ } -+ -+ setting_info->samm_status = SAMM_ON; -+ setting_info->primary_device = get_primary_device(); -+ -+ setting_info->first_dev_bpp = via_fb_bpp; -+ setting_info->second_dev_bpp = via_fb_bpp1; -+ -+ setting_info->first_dev_refresh = refresh; -+ setting_info->second_dev_refresh = refresh1; -+ -+ setting_info->first_dev_hor_res = via_fb_hotplug_Xres; -+ setting_info->first_dev_ver_res = via_fb_hotplug_Yres; -+ setting_info->second_dev_hor_res = second_xres; -+ setting_info->second_dev_ver_res = second_yres; -+ -+ /* Get lcd attributes */ -+ setting_info->lcd_attributes.display_center = lcd_dsp_method; -+ setting_info->lcd_attributes.panel_id = lcd_panel_id; -+ setting_info->lcd_attributes.lcd_mode = lcd_mode; -+} -+ +static void parse_active_dev(void) +{ + CRT_ON = STATE_OFF; @@ -12388,7 +14100,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + parinfo.fbmem_free = parinfo.memsize; + parinfo.fbmem_used = 0; + parinfo.fbmem_virt = ioremap_nocache(parinfo.fbmem, parinfo.memsize); -+ viafbinfo.screen_base = (char *)parinfo.fbmem_virt; ++ viafbinfo.screen_base = (char __iomem *)parinfo.fbmem_virt; + + if (!parinfo.fbmem_virt) { + printk(KERN_INFO "ioremap failed\n"); @@ -12580,7 +14292,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + unregister_framebuffer(&viafbinfo); + if (dual_fb) + unregister_framebuffer(&viafbinfo1); -+ iounmap((void *)parinfo.fbmem_virt); ++ iounmap(parinfo.fbmem_virt); + + viafb_remove_proc(parinfo.proc_entry); +} @@ -12769,7 +14481,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> +#endif --- /dev/null +++ b/drivers/video/viafb/viafbdev.h -@@ -0,0 +1,113 @@ +@@ -0,0 +1,102 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. @@ -12796,6 +14508,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + +#include <linux/proc_fs.h> +#include <linux/fb.h> ++#include "../console/fbcon.h" +#include "ioctl.h" +#include "share.h" +#include "chip.h" @@ -12847,7 +14560,6 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> + struct proc_dir_entry *proc_entry; /*viafb proc entry */ + u8 duoview; /*Is working in duoview mode? */ +}; -+extern unsigned int second_virtual_yres; +extern unsigned int second_virtual_xres; +extern unsigned int second_offset; +extern int second_size; @@ -12860,1429 +14572,19 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> +extern int via_fb_hotplug; +extern int via_fb_memsize; + -+extern int soft_cursor(struct fb_info *info, struct fb_cursor *cursor); -+ +void memory_pitch_patch(struct fb_info *info); +void fill_var_timing_info(struct fb_var_screeninfo *var, int refresh, + int mode_index); -+int apply_device_setting(struct viafb_ioctl_setting ViaSetting, -+ struct fb_info *info); -+void retrieve_device_setting(struct viafb_ioctl_setting *ViaSetting); + -+int get_primary_device(void); +int get_mode_index(int hres, int vres, int flag); -+void viafb_set_device(struct device_t active_dev); + +u8 gpio_i2c_read_lvds(struct lvds_setting_information *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info, u8 index); +void gpio_i2c_write_mask_lvds(struct lvds_setting_information + *plvds_setting_info, struct lvds_chip_information + *plvds_chip_info, struct IODATA io_data); -+void viafb_set_video_device(u32 video_dev_info); -+void viafb_get_video_device(u32 *video_dev_info); -+void apply_second_mode_setting(struct fb_var_screeninfo *sec_var); -+void init_global_var(void); +#endif /* __VIAFBDEV_H__ */ --- /dev/null -+++ b/drivers/video/viafb/viafb.modes -@@ -0,0 +1,870 @@ -+# -+# -+# These data are based on the CRTC parameters in -+# -+# VIA Integration Graphics Chip -+# (C) 2004 VIA Technologies Inc. -+# -+ -+# -+# 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 640 480 -+# Scan Frequency 31.469 kHz 59.94 Hz -+# Sync Width 3.813 us 0.064 ms -+# 12 chars 2 lines -+# Front Porch 0.636 us 0.318 ms -+# 2 chars 10 lines -+# Back Porch 1.907 us 1.048 ms -+# 6 chars 33 lines -+# Active Time 25.422 us 15.253 ms -+# 80 chars 480 lines -+# Blank Time 6.356 us 1.430 ms -+# 20 chars 45 lines -+# Polarity negative negative -+# -+ -+mode "640x480-60" -+# D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz -+ geometry 640 480 640 480 32 -+ timings 39722 48 16 33 10 96 2 endmode mode "480x640-60" -+# D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz -+ geometry 480 640 480 640 32 timings 39722 72 24 19 1 48 3 endmode -+# -+# 640x480, 75 Hz, Non-Interlaced (31.50 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 640 480 -+# Scan Frequency 37.500 kHz 75.00 Hz -+# Sync Width 2.032 us 0.080 ms -+# 8 chars 3 lines -+# Front Porch 0.508 us 0.027 ms -+# 2 chars 1 lines -+# Back Porch 3.810 us 0.427 ms -+# 15 chars 16 lines -+# Active Time 20.317 us 12.800 ms -+# 80 chars 480 lines -+# Blank Time 6.349 us 0.533 ms -+# 25 chars 20 lines -+# Polarity negative negative -+# -+ mode "640x480-75" -+# D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz -+ geometry 640 480 640 480 32 timings 31747 120 16 16 1 64 3 endmode -+# -+# 640x480, 85 Hz, Non-Interlaced (36.000 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 640 480 -+# Scan Frequency 43.269 kHz 85.00 Hz -+# Sync Width 1.556 us 0.069 ms -+# 7 chars 3 lines -+# Front Porch 1.556 us 0.023 ms -+# 7 chars 1 lines -+# Back Porch 2.222 us 0.578 ms -+# 10 chars 25 lines -+# Active Time 17.778 us 11.093 ms -+# 80 chars 480 lines -+# Blank Time 5.333 us 0.670 ms -+# 24 chars 29 lines -+# Polarity negative negative -+# -+ mode "640x480-85" -+# D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz -+ geometry 640 480 640 480 32 timings 27777 80 56 25 1 56 3 endmode -+# -+# 640x480, 100 Hz, Non-Interlaced (43.163 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 640 480 -+# Scan Frequency 50.900 kHz 100.00 Hz -+# Sync Width 1.483 us 0.058 ms -+# 8 chars 3 lines -+# Front Porch 0.927 us 0.019 ms -+# 5 chars 1 lines -+# Back Porch 2.409 us 0.475 ms -+# 13 chars 25 lines -+# Active Time 14.827 us 9.430 ms -+# 80 chars 480 lines -+# Blank Time 4.819 us 0.570 ms -+# 26 chars 29 lines -+# Polarity positive positive -+# -+ mode "640x480-100" -+# D: 43.163 MHz, H: 50.900 kHz, V: 100.00 Hz -+ geometry 640 480 640 480 32 timings 23168 104 40 25 1 64 3 endmode -+# -+# 640x480, 120 Hz, Non-Interlaced (52.406 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 640 480 -+# Scan Frequency 61.800 kHz 120.00 Hz -+# Sync Width 1.221 us 0.048 ms -+# 8 chars 3 lines -+# Front Porch 0.763 us 0.016 ms -+# 5 chars 1 lines -+# Back Porch 1.984 us 0.496 ms -+# 13 chars 31 lines -+# Active Time 12.212 us 7.767 ms -+# 80 chars 480 lines -+# Blank Time 3.969 us 0.566 ms -+# 26 chars 35 lines -+# Polarity positive positive -+# -+ mode "640x480-120" -+# D: 52.406 MHz, H: 61.800 kHz, V: 120.00 Hz -+ geometry 640 480 640 480 32 timings 19081 104 40 31 1 64 3 endmode -+# -+# 720x480, 60 Hz, Non-Interlaced (26.880 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 720 480 -+# Scan Frequency 30.000 kHz 60.241 Hz -+# Sync Width 2.679 us 0.099 ms -+# 9 chars 3 lines -+# Front Porch 0.595 us 0.033 ms -+# 2 chars 1 lines -+# Back Porch 3.274 us 0.462 ms -+# 11 chars 14 lines -+# Active Time 26.786 us 16.000 ms -+# 90 chars 480 lines -+# Blank Time 6.548 us 0.600 ms -+# 22 chars 18 lines -+# Polarity positive positive -+# -+ mode "720x480-60" -+# D: 26.880 MHz, H: 30.000 kHz, V: 60.24 Hz -+ geometry 720 480 720 480 32 timings 37202 88 16 14 1 72 3 endmode -+# -+# 800x480, 60 Hz, Non-Interlaced (29.581 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 800 480 -+# Scan Frequency 29.892 kHz 60.00 Hz -+# Sync Width 2.704 us 100.604 us -+# 10 chars 3 lines -+# Front Porch 0.541 us 33.535 us -+# 2 chars 1 lines -+# Back Porch 3.245 us 435.949 us -+# 12 chars 13 lines -+# Active Time 27.044 us 16.097 ms -+# 100 chars 480 lines -+# Blank Time 6.491 us 0.570 ms -+# 24 chars 17 lines -+# Polarity positive positive -+# -+ mode "800x480-60" -+# D: 29.500 MHz, H: 29.738 kHz, V: 60.00 Hz -+ geometry 800 480 800 480 32 timings 33805 96 24 10 3 72 7 endmode -+# -+# 720x576, 60 Hz, Non-Interlaced (32.668 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 720 576 -+# Scan Frequency 35.820 kHz 60.00 Hz -+# Sync Width 2.204 us 0.083 ms -+# 9 chars 3 lines -+# Front Porch 0.735 us 0.027 ms -+# 3 chars 1 lines -+# Back Porch 2.939 us 0.459 ms -+# 12 chars 17 lines -+# Active Time 22.040 us 16.080 ms -+# 90 chars 476 lines -+# Blank Time 5.877 us 0.586 ms -+# 24 chars 21 lines -+# Polarity positive positive -+# -+ mode "720x576-60" -+# D: 32.668 MHz, H: 35.820 kHz, V: 60.00 Hz -+ geometry 720 576 720 576 32 timings 30611 96 24 17 1 72 3 endmode -+# -+# 800x600, 60 Hz, Non-Interlaced (40.00 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 800 600 -+# Scan Frequency 37.879 kHz 60.32 Hz -+# Sync Width 3.200 us 0.106 ms -+# 16 chars 4 lines -+# Front Porch 1.000 us 0.026 ms -+# 5 chars 1 lines -+# Back Porch 2.200 us 0.607 ms -+# 11 chars 23 lines -+# Active Time 20.000 us 15.840 ms -+# 100 chars 600 lines -+# Blank Time 6.400 us 0.739 ms -+# 32 chars 28 lines -+# Polarity positive positive -+# -+ mode "800x600-60" -+# D: 40.00 MHz, H: 37.879 kHz, V: 60.32 Hz -+ geometry 800 600 800 600 32 -+ timings 25000 88 40 23 1 128 4 hsync high vsync high endmode -+# -+# 800x600, 75 Hz, Non-Interlaced (49.50 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 800 600 -+# Scan Frequency 46.875 kHz 75.00 Hz -+# Sync Width 1.616 us 0.064 ms -+# 10 chars 3 lines -+# Front Porch 0.323 us 0.021 ms -+# 2 chars 1 lines -+# Back Porch 3.232 us 0.448 ms -+# 20 chars 21 lines -+# Active Time 16.162 us 12.800 ms -+# 100 chars 600 lines -+# Blank Time 5.172 us 0.533 ms -+# 32 chars 25 lines -+# Polarity positive positive -+# -+ mode "800x600-75" -+# D: 49.50 MHz, H: 46.875 kHz, V: 75.00 Hz -+ geometry 800 600 800 600 32 -+ timings 20203 160 16 21 1 80 3 hsync high vsync high endmode -+# -+# 800x600, 85 Hz, Non-Interlaced (56.25 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 800 600 -+# Scan Frequency 53.674 kHz 85.061 Hz -+# Sync Width 1.138 us 0.056 ms -+# 8 chars 3 lines -+# Front Porch 0.569 us 0.019 ms -+# 4 chars 1 lines -+# Back Porch 2.702 us 0.503 ms -+# 19 chars 27 lines -+# Active Time 14.222 us 11.179 ms -+# 100 chars 600 lines -+# Blank Time 4.409 us 0.578 ms -+# 31 chars 31 lines -+# Polarity positive positive -+# -+ mode "800x600-85" -+# D: 56.25 MHz, H: 53.674 kHz, V: 85.061 Hz -+ geometry 800 600 800 600 32 -+ timings 17777 152 32 27 1 64 3 hsync high vsync high endmode -+# -+# 800x600, 100 Hz, Non-Interlaced (67.50 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 800 600 -+# Scan Frequency 62.500 kHz 100.00 Hz -+# Sync Width 0.948 us 0.064 ms -+# 8 chars 4 lines -+# Front Porch 0.000 us 0.112 ms -+# 0 chars 7 lines -+# Back Porch 3.200 us 0.224 ms -+# 27 chars 14 lines -+# Active Time 11.852 us 9.600 ms -+# 100 chars 600 lines -+# Blank Time 4.148 us 0.400 ms -+# 35 chars 25 lines -+# Polarity positive positive -+# -+ mode "800x600-100" -+# D: 67.50 MHz, H: 62.500 kHz, V: 100.00 Hz -+ geometry 800 600 800 600 32 -+ timings 14667 216 0 14 7 64 4 hsync high vsync high endmode -+# -+# 800x600, 120 Hz, Non-Interlaced (83.950 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 800 600 -+# Scan Frequency 77.160 kHz 120.00 Hz -+# Sync Width 1.048 us 0.039 ms -+# 11 chars 3 lines -+# Front Porch 0.667 us 0.013 ms -+# 7 chars 1 lines -+# Back Porch 1.715 us 0.507 ms -+# 18 chars 39 lines -+# Active Time 9.529 us 7.776 ms -+# 100 chars 600 lines -+# Blank Time 3.431 us 0.557 ms -+# 36 chars 43 lines -+# Polarity positive positive -+# -+ mode "800x600-120" -+# D: 83.950 MHz, H: 77.160 kHz, V: 120.00 Hz -+ geometry 800 600 800 600 32 -+ timings 11912 144 56 39 1 88 3 hsync high vsync high endmode -+# -+# 848x480, 60 Hz, Non-Interlaced (31.490 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 848 480 -+# Scan Frequency 29.820 kHz 60.00 Hz -+# Sync Width 2.795 us 0.099 ms -+# 11 chars 3 lines -+# Front Porch 0.508 us 0.033 ms -+# 2 chars 1 lines -+# Back Porch 3.303 us 0.429 ms -+# 13 chars 13 lines -+# Active Time 26.929 us 16.097 ms -+# 106 chars 480 lines -+# Blank Time 6.605 us 0.570 ms -+# 26 chars 17 lines -+# Polarity positive positive -+# -+ mode "848x480-60" -+# D: 31.500 MHz, H: 29.830 kHz, V: 60.00 Hz -+ geometry 848 480 848 480 32 -+ timings 31746 104 24 12 3 80 5 hsync high vsync high endmode -+# -+# 856x480, 60 Hz, Non-Interlaced (31.728 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 856 480 -+# Scan Frequency 29.820 kHz 60.00 Hz -+# Sync Width 2.774 us 0.099 ms -+# 11 chars 3 lines -+# Front Porch 0.504 us 0.033 ms -+# 2 chars 1 lines -+# Back Porch 3.728 us 0.429 ms -+# 13 chars 13 lines -+# Active Time 26.979 us 16.097 ms -+# 107 chars 480 lines -+# Blank Time 6.556 us 0.570 ms -+# 26 chars 17 lines -+# Polarity positive positive -+# -+ mode "856x480-60" -+# D: 31.728 MHz, H: 29.820 kHz, V: 60.00 Hz -+ geometry 856 480 856 480 32 -+ timings 31518 104 16 13 1 88 3 -+ hsync high vsync high endmode mode "960x600-60" -+# D: 45.250 MHz, H: 37.212 kHz, V: 60.00 Hz -+ geometry 960 600 960 600 32 timings 22099 128 32 15 3 96 6 endmode -+# -+# 1000x600, 60 Hz, Non-Interlaced (48.068 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1000 600 -+# Scan Frequency 37.320 kHz 60.00 Hz -+# Sync Width 2.164 us 0.080 ms -+# 13 chars 3 lines -+# Front Porch 0.832 us 0.027 ms -+# 5 chars 1 lines -+# Back Porch 2.996 us 0.483 ms -+# 18 chars 18 lines -+# Active Time 20.804 us 16.077 ms -+# 125 chars 600 lines -+# Blank Time 5.991 us 0.589 ms -+# 36 chars 22 lines -+# Polarity negative positive -+# -+ mode "1000x600-60" -+# D: 48.068 MHz, H: 37.320 kHz, V: 60.00 Hz -+ geometry 1000 600 1000 600 32 -+ timings 20834 144 40 18 1 104 3 endmode mode "1024x576-60" -+# D: 46.996 MHz, H: 35.820 kHz, V: 60.00 Hz -+ geometry 1024 576 1024 576 32 -+ timings 21278 144 40 17 1 104 3 endmode mode "1024x600-60" -+# D: 48.964 MHz, H: 37.320 kHz, V: 60.00 Hz -+ geometry 1024 600 1024 600 32 -+ timings 20461 144 40 18 1 104 3 endmode mode "1088x612-60" -+# D: 52.952 MHz, H: 38.040 kHz, V: 60.00 Hz -+ geometry 1088 612 1088 612 32 timings 18877 152 48 16 3 104 5 endmode -+# -+# 1024x512, 60 Hz, Non-Interlaced (41.291 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1024 512 -+# Scan Frequency 31.860 kHz 60.00 Hz -+# Sync Width 2.519 us 0.094 ms -+# 13 chars 3 lines -+# Front Porch 0.775 us 0.031 ms -+# 4 chars 1 lines -+# Back Porch 3.294 us 0.465 ms -+# 17 chars 15 lines -+# Active Time 24.800 us 16.070 ms -+# 128 chars 512 lines -+# Blank Time 6.587 us 0.596 ms -+# 34 chars 19 lines -+# Polarity positive positive -+# -+ mode "1024x512-60" -+# D: 41.291 MHz, H: 31.860 kHz, V: 60.00 Hz -+ geometry 1024 512 1024 512 32 -+ timings 24218 126 32 15 1 104 3 hsync high vsync high endmode -+# -+# 1024x600, 60 Hz, Non-Interlaced (48.875 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1024 768 -+# Scan Frequency 37.252 kHz 60.00 Hz -+# Sync Width 2.128 us 80.532us -+# 13 chars 3 lines -+# Front Porch 0.818 us 26.844 us -+# 5 chars 1 lines -+# Back Porch 2.946 us 483.192 us -+# 18 chars 18 lines -+# Active Time 20.951 us 16.697 ms -+# 128 chars 622 lines -+# Blank Time 5.893 us 0.591 ms -+# 36 chars 22 lines -+# Polarity negative positive -+# -+#mode "1024x600-60" -+# # D: 48.875 MHz, H: 37.252 kHz, V: 60.00 Hz -+# geometry 1024 600 1024 600 32 -+# timings 20460 144 40 18 1 104 3 -+# endmode -+# -+# 1024x768, 60 Hz, Non-Interlaced (65.00 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1024 768 -+# Scan Frequency 48.363 kHz 60.00 Hz -+# Sync Width 2.092 us 0.124 ms -+# 17 chars 6 lines -+# Front Porch 0.369 us 0.062 ms -+# 3 chars 3 lines -+# Back Porch 2.462 us 0.601 ms -+# 20 chars 29 lines -+# Active Time 15.754 us 15.880 ms -+# 128 chars 768 lines -+# Blank Time 4.923 us 0.786 ms -+# 40 chars 38 lines -+# Polarity negative negative -+# -+ mode "1024x768-60" -+# D: 65.00 MHz, H: 48.363 kHz, V: 60.00 Hz -+ geometry 1024 768 1024 768 32 timings 15385 160 24 29 3 136 6 endmode -+# -+# 1024x768, 75 Hz, Non-Interlaced (78.75 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1024 768 -+# Scan Frequency 60.023 kHz 75.03 Hz -+# Sync Width 1.219 us 0.050 ms -+# 12 chars 3 lines -+# Front Porch 0.203 us 0.017 ms -+# 2 chars 1 lines -+# Back Porch 2.235 us 0.466 ms -+# 22 chars 28 lines -+# Active Time 13.003 us 12.795 ms -+# 128 chars 768 lines -+# Blank Time 3.657 us 0.533 ms -+# 36 chars 32 lines -+# Polarity positive positive -+# -+ mode "1024x768-75" -+# D: 78.75 MHz, H: 60.023 kHz, V: 75.03 Hz -+ geometry 1024 768 1024 768 32 -+ timings 12699 176 16 28 1 96 3 hsync high vsync high endmode -+# -+# 1024x768, 85 Hz, Non-Interlaced (94.50 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1024 768 -+# Scan Frequency 68.677 kHz 85.00 Hz -+# Sync Width 1.016 us 0.044 ms -+# 12 chars 3 lines -+# Front Porch 0.508 us 0.015 ms -+# 6 chars 1 lines -+# Back Porch 2.201 us 0.524 ms -+# 26 chars 36 lines -+# Active Time 10.836 us 11.183 ms -+# 128 chars 768 lines -+# Blank Time 3.725 us 0.582 ms -+# 44 chars 40 lines -+# Polarity positive positive -+# -+ mode "1024x768-85" -+# D: 94.50 MHz, H: 68.677 kHz, V: 85.00 Hz -+ geometry 1024 768 1024 768 32 -+ timings 10582 208 48 36 1 96 3 hsync high vsync high endmode -+# -+# 1024x768, 100 Hz, Non-Interlaced (110.0 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1024 768 -+# Scan Frequency 79.023 kHz 99.78 Hz -+# Sync Width 0.800 us 0.101 ms -+# 11 chars 8 lines -+# Front Porch 0.000 us 0.000 ms -+# 0 chars 0 lines -+# Back Porch 2.545 us 0.202 ms -+# 35 chars 16 lines -+# Active Time 9.309 us 9.719 ms -+# 128 chars 768 lines -+# Blank Time 3.345 us 0.304 ms -+# 46 chars 24 lines -+# Polarity negative negative -+# -+ mode "1024x768-100" -+# D: 113.3 MHz, H: 79.023 kHz, V: 99.78 Hz -+ geometry 1024 768 1024 768 32 -+ timings 8825 280 0 16 0 88 8 endmode mode "1152x720-60" -+# D: 66.750 MHz, H: 44.859 kHz, V: 60.00 Hz -+ geometry 1152 720 1152 720 32 timings 14981 168 56 19 3 112 6 endmode -+# -+# 1152x864, 75 Hz, Non-Interlaced (110.0 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1152 864 -+# Scan Frequency 75.137 kHz 74.99 Hz -+# Sync Width 1.309 us 0.106 ms -+# 18 chars 8 lines -+# Front Porch 0.245 us 0.599 ms -+# 3 chars 45 lines -+# Back Porch 1.282 us 1.132 ms -+# 18 chars 85 lines -+# Active Time 10.473 us 11.499 ms -+# 144 chars 864 lines -+# Blank Time 2.836 us 1.837 ms -+# 39 chars 138 lines -+# Polarity positive positive -+# -+ mode "1152x864-75" -+# D: 110.0 MHz, H: 75.137 kHz, V: 74.99 Hz -+ geometry 1152 864 1152 864 32 -+ timings 9259 144 24 85 45 144 8 -+ hsync high vsync high endmode mode "1200x720-60" -+# D: 70.184 MHz, H: 44.760 kHz, V: 60.00 Hz -+ geometry 1200 720 1200 720 32 -+ timings 14253 184 28 22 1 128 3 endmode mode "1280x600-60" -+# D: 61.503 MHz, H: 37.320 kHz, V: 60.00 Hz -+ geometry 1280 600 1280 600 32 -+ timings 16260 184 28 18 1 128 3 endmode mode "1280x720-50" -+# D: 60.466 MHz, H: 37.050 kHz, V: 50.00 Hz -+ geometry 1280 720 1280 720 32 -+ timings 16538 176 48 17 1 128 3 endmode mode "1280x768-50" -+# D: 65.178 MHz, H: 39.550 kHz, V: 50.00 Hz -+ geometry 1280 768 1280 768 32 timings 15342 184 28 19 1 128 3 endmode -+# -+# 1280x768, 60 Hz, Non-Interlaced (80.136 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1280 768 -+# Scan Frequency 47.700 kHz 60.00 Hz -+# Sync Width 1.697 us 0.063 ms -+# 17 chars 3 lines -+# Front Porch 0.799 us 0.021 ms -+# 8 chars 1 lines -+# Back Porch 2.496 us 0.483 ms -+# 25 chars 23 lines -+# Active Time 15.973 us 16.101 ms -+# 160 chars 768 lines -+# Blank Time 4.992 us 0.566 ms -+# 50 chars 27 lines -+# Polarity positive positive -+# -+ mode "1280x768-60" -+# D: 80.13 MHz, H: 47.700 kHz, V: 60.00 Hz -+ geometry 1280 768 1280 768 32 -+ timings 12480 200 48 23 1 126 3 hsync high vsync high endmode -+# -+# 1280x800, 60 Hz, Non-Interlaced (83.375 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1280 800 -+# Scan Frequency 49.628 kHz 60.00 Hz -+# Sync Width 1.631 us 60.450 us -+# 17 chars 3 lines -+# Front Porch 0.768 us 20.15 us -+# 8 chars 1 lines -+# Back Porch 2.399 us 0.483 ms -+# 25 chars 24 lines -+# Active Time 15.352 us 16.120 ms -+# 160 chars 800 lines -+# Blank Time 4.798 us 0.564 ms -+# 50 chars 28 lines -+# Polarity negtive positive -+# -+ mode "1280x800-60" -+# D: 83.500 MHz, H: 49.702 kHz, V: 60.00 Hz -+ geometry 1280 800 1280 800 32 timings 11994 200 72 22 3 128 6 endmode -+# -+# 1280x960, 60 Hz, Non-Interlaced (108.00 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1280 960 -+# Scan Frequency 60.000 kHz 60.00 Hz -+# Sync Width 1.037 us 0.050 ms -+# 14 chars 3 lines -+# Front Porch 0.889 us 0.017 ms -+# 12 chars 1 lines -+# Back Porch 2.889 us 0.600 ms -+# 39 chars 36 lines -+# Active Time 11.852 us 16.000 ms -+# 160 chars 960 lines -+# Blank Time 4.815 us 0.667 ms -+# 65 chars 40 lines -+# Polarity positive positive -+# -+ mode "1280x960-60" -+# D: 108.00 MHz, H: 60.000 kHz, V: 60.00 Hz -+ geometry 1280 960 1280 960 32 -+ timings 9259 312 96 36 1 112 3 hsync high vsync high endmode -+# -+# 1280x1024, 60 Hz, Non-Interlaced (108.00 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1280 1024 -+# Scan Frequency 63.981 kHz 60.02 Hz -+# Sync Width 1.037 us 0.047 ms -+# 14 chars 3 lines -+# Front Porch 0.444 us 0.015 ms -+# 6 chars 1 lines -+# Back Porch 2.297 us 0.594 ms -+# 31 chars 38 lines -+# Active Time 11.852 us 16.005 ms -+# 160 chars 1024 lines -+# Blank Time 3.778 us 0.656 ms -+# 51 chars 42 lines -+# Polarity positive positive -+# -+ mode "1280x1024-60" -+# D: 108.00 MHz, H: 63.981 kHz, V: 60.02 Hz -+ geometry 1280 1024 1280 1024 32 -+ timings 9260 248 48 38 1 112 3 hsync high vsync high endmode -+# -+# 1280x1024, 75 Hz, Non-Interlaced (135.00 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1280 1024 -+# Scan Frequency 79.976 kHz 75.02 Hz -+# Sync Width 1.067 us 0.038 ms -+# 18 chars 3 lines -+# Front Porch 0.119 us 0.012 ms -+# 2 chars 1 lines -+# Back Porch 1.837 us 0.475 ms -+# 31 chars 38 lines -+# Active Time 9.481 us 12.804 ms -+# 160 chars 1024 lines -+# Blank Time 3.022 us 0.525 ms -+# 51 chars 42 lines -+# Polarity positive positive -+# -+ mode "1280x1024-75" -+# D: 135.00 MHz, H: 79.976 kHz, V: 75.02 Hz -+ geometry 1280 1024 1280 1024 32 -+ timings 7408 248 16 38 1 144 3 hsync high vsync high endmode -+# -+# 1280x1024, 85 Hz, Non-Interlaced (157.50 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1280 1024 -+# Scan Frequency 91.146 kHz 85.02 Hz -+# Sync Width 1.016 us 0.033 ms -+# 20 chars 3 lines -+# Front Porch 0.406 us 0.011 ms -+# 8 chars 1 lines -+# Back Porch 1.422 us 0.483 ms -+# 28 chars 44 lines -+# Active Time 8.127 us 11.235 ms -+# 160 chars 1024 lines -+# Blank Time 2.844 us 0.527 ms -+# 56 chars 48 lines -+# Polarity positive positive -+# -+ mode "1280x1024-85" -+# D: 157.50 MHz, H: 91.146 kHz, V: 85.02 Hz -+ geometry 1280 1024 1280 1024 32 -+ timings 6349 224 64 44 1 160 3 -+ hsync high vsync high endmode mode "1440x900-60" -+# D: 106.500 MHz, H: 55.935 kHz, V: 60.00 Hz -+ geometry 1440 900 1440 900 32 -+ timings 9390 232 80 25 3 152 6 -+ hsync high vsync high endmode mode "1440x900-75" -+# D: 136.750 MHz, H: 70.635 kHz, V: 75.00 Hz -+ geometry 1440 900 1440 900 32 -+ timings 7315 248 96 33 3 152 6 hsync high vsync high endmode -+# -+# 1440x1050, 60 Hz, Non-Interlaced (125.10 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1440 1050 -+# Scan Frequency 65.220 kHz 60.00 Hz -+# Sync Width 1.204 us 0.046 ms -+# 19 chars 3 lines -+# Front Porch 0.760 us 0.015 ms -+# 12 chars 1 lines -+# Back Porch 1.964 us 0.495 ms -+# 31 chars 33 lines -+# Active Time 11.405 us 16.099 ms -+# 180 chars 1050 lines -+# Blank Time 3.928 us 0.567 ms -+# 62 chars 37 lines -+# Polarity positive positive -+# -+ mode "1440x1050-60" -+# D: 125.10 MHz, H: 65.220 kHz, V: 60.00 Hz -+ geometry 1440 1050 1440 1050 32 -+ timings 7993 248 96 33 1 152 3 -+ hsync high vsync high endmode mode "1600x900-60" -+# D: 118.250 MHz, H: 55.990 kHz, V: 60.00 Hz -+ geometry 1600 900 1600 900 32 -+ timings 8415 256 88 26 3 168 5 endmode mode "1600x1024-60" -+# D: 136.358 MHz, H: 63.600 kHz, V: 60.00 Hz -+ geometry 1600 1024 1600 1024 32 timings 7315 272 104 32 1 168 3 endmode -+# -+# 1600x1200, 60 Hz, Non-Interlaced (156.00 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1600 1200 -+# Scan Frequency 76.200 kHz 60.00 Hz -+# Sync Width 1.026 us 0.105 ms -+# 20 chars 8 lines -+# Front Porch 0.205 us 0.131 ms -+# 4 chars 10 lines -+# Back Porch 1.636 us 0.682 ms -+# 32 chars 52 lines -+# Active Time 10.256 us 15.748 ms -+# 200 chars 1200 lines -+# Blank Time 2.872 us 0.866 ms -+# 56 chars 66 lines -+# Polarity negative negative -+# -+ mode "1600x1200-60" -+# D: 156.00 MHz, H: 76.200 kHz, V: 60.00 Hz -+ geometry 1600 1200 1600 1200 32 timings 6172 256 32 52 10 160 8 endmode -+# -+# 1600x1200, 75 Hz, Non-Interlaced (202.50 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1600 1200 -+# Scan Frequency 93.750 kHz 75.00 Hz -+# Sync Width 0.948 us 0.032 ms -+# 24 chars 3 lines -+# Front Porch 0.316 us 0.011 ms -+# 8 chars 1 lines -+# Back Porch 1.501 us 0.491 ms -+# 38 chars 46 lines -+# Active Time 7.901 us 12.800 ms -+# 200 chars 1200 lines -+# Blank Time 2.765 us 0.533 ms -+# 70 chars 50 lines -+# Polarity positive positive -+# -+ mode "1600x1200-75" -+# D: 202.50 MHz, H: 93.750 kHz, V: 75.00 Hz -+ geometry 1600 1200 1600 1200 32 -+ timings 4938 304 64 46 1 192 3 -+ hsync high vsync high endmode mode "1680x1050-60" -+# D: 146.250 MHz, H: 65.290 kHz, V: 59.954 Hz -+ geometry 1680 1050 1680 1050 32 -+ timings 6814 280 104 30 3 176 6 -+ hsync high vsync high endmode mode "1680x1050-75" -+# D: 187.000 MHz, H: 82.306 kHz, V: 74.892 Hz -+ geometry 1680 1050 1680 1050 32 -+ timings 5348 296 120 40 3 176 6 -+ hsync high vsync high endmode mode "1792x1344-60" -+# D: 202.975 MHz, H: 83.460 kHz, V: 60.00 Hz -+ geometry 1792 1344 1792 1344 32 -+ timings 4902 320 128 43 1 192 3 -+ hsync high vsync high endmode mode "1856x1392-60" -+# D: 218.571 MHz, H: 86.460 kHz, V: 60.00 Hz -+ geometry 1856 1392 1856 1392 32 -+ timings 4577 336 136 45 1 200 3 -+ hsync high vsync high endmode mode "1920x1200-60" -+# D: 193.250 MHz, H: 74.556 kHz, V: 60.00 Hz -+ geometry 1920 1200 1920 1200 32 -+ timings 5173 336 136 36 3 200 6 -+ hsync high vsync high endmode mode "1920x1440-60" -+# D: 234.000 MHz, H:90.000 kHz, V: 60.00 Hz -+ geometry 1920 1440 1920 1440 32 -+ timings 4274 344 128 56 1 208 3 -+ hsync high vsync high endmode mode "1920x1440-75" -+# D: 297.000 MHz, H:112.500 kHz, V: 75.00 Hz -+ geometry 1920 1440 1920 1440 32 -+ timings 3367 352 144 56 1 224 3 -+ hsync high vsync high endmode mode "2048x1536-60" -+# D: 267.250 MHz, H: 95.446 kHz, V: 60.00 Hz -+ geometry 2048 1536 2048 1536 32 -+ timings 3742 376 152 49 3 224 4 hsync high vsync high endmode -+# -+# 1280x720, 60 Hz, Non-Interlaced (74.481 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1280 720 -+# Scan Frequency 44.760 kHz 60.00 Hz -+# Sync Width 1.826 us 67.024 ms -+# 17 chars 3 lines -+# Front Porch 0.752 us 22.341 ms -+# 7 chars 1 lines -+# Back Porch 2.578 us 491.510 ms -+# 24 chars 22 lines -+# Active Time 17.186 us 16.086 ms -+# 160 chars 720 lines -+# Blank Time 5.156 us 0.581 ms -+# 48 chars 26 lines -+# Polarity negative negative -+# -+ mode "1280x720-60" -+# D: 74.481 MHz, H: 44.760 kHz, V: 60.00 Hz -+ geometry 1280 720 1280 720 32 timings 13426 192 64 22 1 136 3 endmode -+# -+# 1920x1080, 60 Hz, Non-Interlaced (172.798 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1920 1080 -+# Scan Frequency 67.080 kHz 60.00 Hz -+# Sync Width 1.204 us 44.723 ms -+# 26 chars 3 lines -+# Front Porch 0.694 us 14.908 ms -+# 15 chars 1 lines -+# Back Porch 1.898 us 506.857 ms -+# 41 chars 34 lines -+# Active Time 11.111 us 16.100 ms -+# 240 chars 1080 lines -+# Blank Time 3.796 us 0.566 ms -+# 82 chars 38 lines -+# Polarity negative negative -+# -+ mode "1920x1080-60" -+# D: 74.481 MHz, H: 67.080 kHz, V: 60.00 Hz -+ geometry 1920 1080 1920 1080 32 timings 5787 328 120 34 1 208 3 endmode -+# -+# 1400x1050, 60 Hz, Non-Interlaced (122.61 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1400 1050 -+# Scan Frequency 65.218 kHz 59.99 Hz -+# Sync Width 1.037 us 0.047 ms -+# 19 chars 3 lines -+# Front Porch 0.444 us 0.015 ms -+# 11 chars 1 lines -+# Back Porch 1.185 us 0.188 ms -+# 30 chars 33 lines -+# Active Time 12.963 us 16.411 ms -+# 175 chars 1050 lines -+# Blank Time 2.667 us 0.250 ms -+# 60 chars 37 lines -+# Polarity negative positive -+# -+ mode "1400x1050-60" -+# D: 122.750 MHz, H: 65.317 kHz, V: 59.99 Hz -+ geometry 1400 1050 1408 1050 32 -+ timings 8214 232 88 32 3 144 4 endmode mode "1400x1050-75" -+# D: 156.000 MHz, H: 82.278 kHz, V: 74.867 Hz -+ geometry 1400 1050 1408 1050 32 timings 6410 248 104 42 3 144 4 endmode -+# -+# 1366x768, 60 Hz, Non-Interlaced (85.86 MHz dotclock) -+# -+# Horizontal Vertical -+# Resolution 1366 768 -+# Scan Frequency 47.700 kHz 60.00 Hz -+# Sync Width 1.677 us 0.063 ms -+# 18 chars 3 lines -+# Front Porch 0.839 us 0.021 ms -+# 9 chars 1 lines -+# Back Porch 2.516 us 0.482 ms -+# 27 chars 23 lines -+# Active Time 15.933 us 16.101 ms -+# 171 chars 768 lines -+# Blank Time 5.031 us 0.566 ms -+# 54 chars 27 lines -+# Polarity negative positive -+# -+ mode "1360x768-60" -+# D: 84.750 MHz, H: 47.720 kHz, V: 60.00 Hz -+ geometry 1360 768 1360 768 32 -+ timings 11799 208 72 22 3 136 5 endmode mode "1366x768-60" -+# D: 85.86 MHz, H: 47.700 kHz, V: 60.00 Hz -+ geometry 1366 768 1366 768 32 -+ timings 11647 216 72 23 1 144 3 endmode mode "1366x768-50" -+# D: 69,924 MHz, H: 39.550 kHz, V: 50.00 Hz -+ geometry 1366 768 1366 768 32 timings 14301 200 56 19 1 144 3 endmode ---- /dev/null -+++ b/drivers/video/viafb/via_i2c.c -@@ -0,0 +1,469 @@ -+/* -+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. -+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. -+ -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published -+ * by the Free Software Foundation; either version 2, or (at your option) -+ * any later version. -+ -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even -+ * the implied warranty of MERCHANTABILITY or FITNESS FOR -+ * A PARTICULAR PURPOSE.See the GNU General Public License -+ * for more details. -+ -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., -+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -+ */ -+ -+#include "global.h" -+ -+/* i2c delay for microsecond*/ -+void delays(int count) -+{ -+ u8 data; -+ while (count--) { -+ /* delay 1 us */ -+ data = inb(DELAYPORT); -+ data = inb(DELAYPORT); -+ data = inb(DELAYPORT); -+ data = inb(DELAYPORT); -+ data = inb(DELAYPORT); -+ } -+ -+} -+ -+/* Write I2C BUS SDA And SCL*/ -+void i2cWriteSdaScl(u8 sda, u8 scl) -+{ -+ u8 data; -+ u16 port_addr; -+ -+ if (chip_info.chip_on_slot == PORT_ON_AMR) { -+ -+ data = ((scl << 1) | sda) << 4; -+ /* enable I2C port */ -+ data = data | BIT0; -+ -+ port_addr = I2CPORT; -+ /* Write Register Value */ -+ write_reg(I2CPORTINDEX, port_addr, data); -+ } else { -+ if (chip_info.chip_on_slot == PORT_ON_AGP) { -+ data = ((scl << 1) | sda) << 4; -+ /* enable GPIO write port */ -+ data = data | (BIT6 + BIT7); -+ port_addr = GPIOPORT; -+ /* Write Register Value */ -+ write_reg(GPIOPORTINDEX, port_addr, data); -+ } -+ } -+} -+ -+void i2cWriteScl(u8 scl) -+{ -+ u8 data; -+ u16 port_addr; -+ -+ if (chip_info.chip_on_slot == PORT_ON_AMR) { -+ -+ data = (scl << 1) << 4; -+ /* enable I2C port */ -+ data = data | BIT0; -+ -+ port_addr = I2CPORT; -+ /* Write Register Value */ -+ write_reg(I2CPORTINDEX, port_addr, data); -+ } else { -+ if (chip_info.chip_on_slot == PORT_ON_AGP) { -+ data = (scl << 1) << 4; -+ /* enable GPIO write clock */ -+ data = data & 0xBF; -+ port_addr = GPIOPORT; -+ /* Write Register Value */ -+ write_reg(GPIOPORTINDEX, port_addr, data); -+ } -+ } -+} -+ -+void i2cReadSdaScl(u8 *pSda, u8 *pScl) -+{ -+ u8 data; -+ u16 port_addr; -+ -+ if (chip_info.chip_on_slot == PORT_ON_AMR) { -+ port_addr = I2CPORT; -+ data = read_reg(port_addr, I2CPORTINDEX); -+ *pSda = (data >> 2) & BIT0; /* get sda */ -+ *pScl = (data >> 3) & BIT0; /* get scl */ -+ } else { -+ if (chip_info.chip_on_slot == PORT_ON_AGP) { -+ port_addr = GPIOPORT; -+ data = read_reg(port_addr, GPIOPORTINDEX); -+ *pSda = (data >> 2) & BIT0; /* get sda */ -+ *pScl = (data >> 3) & BIT0; /* get scl */ -+ } -+ } -+} -+ -+void i2cWriteSdaSclDelay(u8 sda, u8 scl) -+{ -+ i2cWriteSdaScl(sda, scl); -+ delays(16); /* Wait 16 uS */ -+} -+ -+void i2cStartSignal(void) -+{ -+ i2cWriteSdaSclDelay(1, 1); -+ i2cWriteSdaSclDelay(0, 1); -+ i2cWriteSdaSclDelay(0, 0); -+} -+ -+void i2cStopSignal(void) -+{ -+ u8 data; -+ u16 port_addr; -+ -+ i2cWriteSdaSclDelay(0, 0); -+ i2cWriteSdaSclDelay(0, 1); -+ i2cWriteSdaSclDelay(1, 1); -+ -+ if (chip_info.chip_on_slot == PORT_ON_AGP) { -+ /* disable GPIO write port */ -+ data = 0x3c; -+ port_addr = GPIOPORT; -+ /* Write Register Value */ -+ write_reg(GPIOPORTINDEX, port_addr, data); -+ } -+ delays(2); -+ -+} -+ -+void disableSdaGPIO(void) -+{ -+ u8 data; -+ u16 port_addr; -+ -+ if (chip_info.chip_on_slot == PORT_ON_AGP) { -+ port_addr = GPIOPORT; -+ data = read_reg(port_addr, GPIOPORTINDEX); -+ /* disable GPIO write port */ -+ data = data & (~BIT6); -+ /* Write Register Value */ -+ write_reg(GPIOPORTINDEX, port_addr, data); -+ } -+} -+ -+void enableSdaGPIO(void) -+{ -+ u8 data; -+ u16 port_addr; -+ -+ if (chip_info.chip_on_slot == PORT_ON_AGP) { -+ port_addr = GPIOPORT; -+ data = read_reg(port_addr, GPIOPORTINDEX); -+ /* disable GPIO write port */ -+ data = data | (BIT6); -+ /* Write Register Value */ -+ write_reg(GPIOPORTINDEX, port_addr, data); -+ } -+} -+ -+void writeSclGPIO(u8 scl) -+{ -+ u8 data; -+ u16 port_addr; -+ -+ if (chip_info.chip_on_slot == PORT_ON_AGP) { -+ port_addr = GPIOPORT; -+ data = read_reg(port_addr, GPIOPORTINDEX); -+ data = data & (~BIT5); -+ /* write data to clock */ -+ data = (data | (scl << 5)) & (~BIT6); -+ /* Write Register Value */ -+ write_reg(GPIOPORTINDEX, port_addr, data); -+ } -+} -+ -+void writeSdaGPIO(u8 sda) -+{ -+ u8 data; -+ u16 port_addr; -+ -+ if (chip_info.chip_on_slot == PORT_ON_AGP) { -+ port_addr = GPIOPORT; -+ data = read_reg(port_addr, GPIOPORTINDEX); -+ -+ data = data & (~BIT4); -+ /* write data to clock */ -+ data = (data | (sda << 4)) & (~BIT7); -+ /* Write Register Value */ -+ write_reg(GPIOPORTINDEX, port_addr, data); -+ } -+} -+ -+void enableGPIO(void) -+{ -+ u8 data; -+ u16 port_addr; -+ -+ if (chip_info.chip_on_slot == PORT_ON_AGP) { -+ port_addr = GPIOPORT; -+ data = read_reg(port_addr, GPIOPORTINDEX); -+ /* enable GPIO write port */ -+ data = data | (BIT4 + BIT5 + BIT6 + BIT7); -+ /* Write Register Value */ -+ write_reg(GPIOPORTINDEX, port_addr, data); -+ } -+} -+ -+void releaseGPIO(void) -+{ -+ u8 data; -+ u16 port_addr; -+ -+ if (chip_info.chip_on_slot == PORT_ON_AGP) { -+ port_addr = GPIOPORT; -+ port_addr = port_addr + 1; -+ -+ data = read_reg(port_addr, GPIOPORTINDEX); -+ /* disable GPIO write port */ -+ data = data & 0x3c; -+ port_addr = GPIOPORT; -+ /* Write Register Value */ -+ write_reg(GPIOPORTINDEX, port_addr, data); -+ } -+} -+ -+int i2CWaitForSlave(void) -+{ -+ int time_out = 20000; -+ u8 sda, scl; -+ -+ while (time_out--) { -+ i2cReadSdaScl(&sda, &scl); -+ if (scl) -+ return (OK); /* Successful stall */ -+ delays(1); /* wait 1 uS */ -+ } -+ return (FAIL); /* Slave fail */ -+} -+ -+int i2cOutByte(u8 data) -+{ -+ u8 sda, scl; -+ u8 out_byte; -+ int bit_count = 8; -+ int status; -+ -+ out_byte = data; -+ while (bit_count--) { -+ sda = (out_byte >> 7) & 1; /* Load MSB */ -+ out_byte = out_byte << 1; /* next bit. */ -+ i2cWriteSdaSclDelay(sda, 0); -+ i2cWriteSdaSclDelay(sda, 1); -+ -+ status = i2CWaitForSlave(); -+ if (status == FAIL) -+ return (status); -+ i2cWriteSdaSclDelay(sda, 0); -+ -+ } -+ -+ if ((chip_info.chip_on_slot == PORT_ON_AGP)) { -+ -+ writeSclGPIO(0); -+ disableSdaGPIO(); -+ delays(2); -+ writeSclGPIO(1); -+ delays(2); -+ i2cReadSdaScl(&sda, &scl); -+ writeSclGPIO(0); -+ delays(2); -+ if (sda == 0) -+ status = OK; -+ else -+ status = FAIL; -+ -+ } else { -+ i2cWriteSdaSclDelay(1, 0); -+ i2cWriteSdaSclDelay(1, 1); -+ status = i2CWaitForSlave(); -+ if (status == FAIL) -+ return (status); -+ -+ i2cReadSdaScl(&sda, &scl); -+ if (sda == 0) { -+ i2cWriteSdaSclDelay(1, 0); -+ status = OK; -+ } else { -+ -+ i2cWriteSdaSclDelay(1, 0); -+ status = FAIL; -+ } -+ } -+ return (status); -+} -+ -+int i2cInputByte(u8 *pInByte, int ack) -+{ -+ -+ int bit_count = 8; -+ u8 sda, scl; -+ u8 data = 0; -+ int status; -+ -+ disableSdaGPIO(); -+ -+ while (bit_count--) { -+ if ((chip_info.chip_on_slot == PORT_ON_AGP)) { -+ -+ writeSclGPIO(1); -+ delays(2); -+ status = i2CWaitForSlave(); -+ if (status == FAIL) -+ return (FAIL); -+ i2cReadSdaScl(&sda, &scl); -+ data = data << 1; -+ data |= sda; -+ writeSclGPIO(0); -+ delays(2); -+ -+ } else { -+ i2cWriteSdaSclDelay(1, 1); -+ status = i2CWaitForSlave(); -+ if (status == FAIL) -+ return (FAIL); -+ i2cReadSdaScl(&sda, &scl); -+ data = data << 1; -+ data |= sda; -+ i2cWriteSdaSclDelay(1, 0); -+ } -+ } -+ *pInByte = data; -+ -+ if (ack) { -+ i2cWriteSdaSclDelay(0, 0); -+ i2cWriteSdaSclDelay(0, 1); -+ status = i2CWaitForSlave(); -+ if (status == FAIL) -+ return (status); -+ i2cWriteSdaSclDelay(0, 0); -+ } else { -+ i2cWriteSdaSclDelay(1, 0); -+ i2cWriteSdaSclDelay(1, 1); -+ status = i2CWaitForSlave(); -+ if (status == FAIL) -+ return (status); -+ } -+ i2cWriteSdaSclDelay(1, 0); -+ -+ return (OK); -+} -+ -+int i2cReadByte(u8 slave_addr, u8 index, u8 *pData) -+{ -+ -+ int status; -+ -+ i2cStartSignal(); -+ -+ status = i2cOutByte(slave_addr); -+ if (status == FAIL) { -+ i2cStopSignal(); -+ return (FAIL); -+ } -+ status = i2cOutByte(index); -+ -+ if (status == FAIL) { -+ i2cStopSignal(); -+ return (FAIL); -+ } -+ -+ i2cStartSignal(); -+ status = i2cOutByte(slave_addr | BIT0); -+ if (status == FAIL) { -+ i2cStopSignal(); -+ return (FAIL); -+ } -+ status = i2cInputByte(pData, 0); -+ if (status == FAIL) { -+ i2cStopSignal(); -+ return (FAIL); -+ } -+ -+ i2cStopSignal(); -+ return (OK); -+} -+ -+int i2cWriteByte(u8 slave_addr, u8 index, u8 data) -+{ -+ -+ int status; -+ -+ i2cStartSignal(); -+ status = i2cOutByte(slave_addr); -+ if (status == FAIL) { -+ i2cStopSignal(); -+ return (FAIL); -+ } -+ status = i2cOutByte(index); -+ if (status == FAIL) { -+ i2cStopSignal(); -+ return (FAIL); -+ } -+ status = i2cOutByte(data); -+ if (status == FAIL) { -+ i2cStopSignal(); -+ return (FAIL); -+ } -+ i2cStopSignal(); -+ return (OK); -+} -+ -+int i2cReadBytes(u8 slave_addr, u8 index, u8 *buff, int buff_len) -+{ -+ -+ int status, i; -+ -+ i2cStartSignal(); -+ -+ status = i2cOutByte(slave_addr); -+ if (status == FAIL) { -+ i2cStopSignal(); -+ return (FAIL); -+ } -+ -+ status = i2cOutByte(index); -+ if (status == FAIL) { -+ i2cStopSignal(); -+ return (FAIL); -+ } -+ -+ i2cStartSignal(); -+ status = i2cOutByte(slave_addr | BIT0); -+ if (status == FAIL) { -+ i2cStopSignal(); -+ return (FAIL); -+ } -+ -+ for (i = 0; i < buff_len; i++) { -+ if (buff_len == 1) -+ status = i2cInputByte(buff, 0); /* send NACK */ -+ else if (i < buff_len - 1) -+ status = i2cInputByte(buff, 1); /* send ACK */ -+ else -+ status = i2cInputByte(buff, 0); /* send NACK */ -+ if (status == FAIL) { -+ i2cStopSignal(); -+ return (FAIL); -+ } -+ buff++; -+ } -+ -+ i2cStopSignal(); -+ return (OK); -+} ---- /dev/null -+++ b/drivers/video/viafb/via_i2c.h -@@ -0,0 +1,51 @@ -+/* -+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. -+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. -+ -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published -+ * by the Free Software Foundation; either version 2, or (at your option) -+ * any later version. -+ -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even -+ * the implied warranty of MERCHANTABILITY or FITNESS FOR -+ * A PARTICULAR PURPOSE.See the GNU General Public License -+ * for more details. -+ -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., -+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -+ */ -+#ifndef __VIA_I2C_H__ -+#define __VIA_I2C_H__ -+ -+#define I2CPORT 0x3c4 -+#define I2CPORTINDEX 0x31 -+#define GPIOPORT 0x3C4 -+#define GPIOPORTINDEX 0x2C -+#define I2C_BUS 1 -+#define GPIO_BUS 2 -+#define DELAYPORT 0x3C3 -+ -+void delays(int count); -+void i2cWriteSdaScl(u8 sda, u8 scl); -+void i2cWriteScl(u8 scl); -+void i2cReadSdaScl(u8 *pSda, u8 *pScl); -+void i2cWriteSdaSclDelay(u8 sda, u8 scl); -+void i2cStartSignal(void); -+void i2cStopSignal(void); -+void disableSdaGPIO(void); -+void enableSdaGPIO(void); -+void writeSclGPIO(u8 scl); -+void writeSdaGPIO(u8 sda); -+void enableGPIO(void); -+void releaseGPIO(void); -+int i2CWaitForSlave(void); -+int i2cOutByte(u8 data); -+int i2cInputByte(u8 *pInByte, int ack); -+int i2cReadByte(u8 slave_addr, u8 index, u8 *pData); -+int i2cWriteByte(u8 slave_addr, u8 index, u8 data); -+int i2cReadBytes(u8 slave_addr, u8 index, u8 *buff, int buff_len); -+#endif /* __VIA_I2C_H__ */ ---- /dev/null +++ b/drivers/video/viafb/viamode.c @@ -0,0 +1,1086 @@ +/* @@ -15552,346 +15854,6 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> +extern struct VPITTable VPIT; +#endif /* __VIAMODE_H__ */ --- /dev/null -+++ b/drivers/video/viafb/via_utility.c -@@ -0,0 +1,299 @@ -+/* -+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. -+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. -+ -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published -+ * by the Free Software Foundation; either version 2, or (at your option) -+ * any later version. -+ -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even -+ * the implied warranty of MERCHANTABILITY or FITNESS FOR -+ * A PARTICULAR PURPOSE.See the GNU General Public License -+ * for more details. -+ -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., -+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -+ */ -+ -+#include "global.h" -+ -+void get_device_support_state(u32 *support_state) -+{ -+ *support_state = CRT_Device; -+ -+ if (chip_info.tmds_chip_info.tmds_chip_name == VT1632_TMDS) -+ *support_state |= DVI_Device; -+ -+ if (chip_info.lvds_chip_info.lvds_chip_name == VT1631_LVDS) -+ *support_state |= LCD_Device; -+} -+ -+void get_device_connect_state(u32 *connect_state) -+{ -+ bool mobile = FALSE; -+ -+ *connect_state = CRT_Device; -+ -+ if (dvi_sense()) -+ *connect_state |= DVI_Device; -+ -+ lcd_get_mobile_state(&mobile); -+ if (mobile) -+ *connect_state |= LCD_Device; -+} -+ -+bool lcd_get_support_expand_state(u32 xres, u32 yres) -+{ -+ unsigned int support_state = 0; -+ -+ switch (lcd_panel_id) { -+ case LCD_PANEL_ID0_640X480: -+ if ((xres < 640) && (yres < 480)) -+ support_state = TRUE; -+ break; -+ -+ case LCD_PANEL_ID1_800X600: -+ if ((xres < 800) && (yres < 600)) -+ support_state = TRUE; -+ break; -+ -+ case LCD_PANEL_ID2_1024X768: -+ if ((xres < 1024) && (yres < 768)) -+ support_state = TRUE; -+ break; -+ -+ case LCD_PANEL_ID3_1280X768: -+ if ((xres < 1280) && (yres < 768)) -+ support_state = TRUE; -+ break; -+ -+ case LCD_PANEL_ID4_1280X1024: -+ if ((xres < 1280) && (yres < 1024)) -+ support_state = TRUE; -+ break; -+ -+ case LCD_PANEL_ID5_1400X1050: -+ if ((xres < 1400) && (yres < 1050)) -+ support_state = TRUE; -+ break; -+ -+ case LCD_PANEL_ID6_1600X1200: -+ if ((xres < 1600) && (yres < 1200)) -+ support_state = TRUE; -+ break; -+ -+ case LCD_PANEL_ID7_1366X768: -+ if ((xres < 1366) && (yres < 768)) -+ support_state = TRUE; -+ break; -+ -+ case LCD_PANEL_ID8_1024X600: -+ if ((xres < 1024) && (yres < 600)) -+ support_state = TRUE; -+ break; -+ -+ case LCD_PANEL_ID9_1280X800: -+ if ((xres < 1280) && (yres < 800)) -+ support_state = TRUE; -+ break; -+ -+ case LCD_PANEL_IDA_800X480: -+ if ((xres < 800) && (yres < 480)) -+ support_state = TRUE; -+ break; -+ -+ case LCD_PANEL_IDB_1360X768: -+ if ((xres < 1360) && (yres < 768)) -+ support_state = TRUE; -+ break; -+ -+ case LCD_PANEL_IDC_480X640: -+ if ((xres < 480) && (yres < 640)) -+ support_state = TRUE; -+ break; -+ -+ default: -+ support_state = FALSE; -+ break; -+ } -+ -+ return support_state; -+} -+ -+/*====================================================================*/ -+/* Gamma Function Implementation*/ -+/*====================================================================*/ -+ -+void set_gamma_table(int bpp, unsigned int *gamma_table) -+{ -+ int i, sr1a; -+ int active_device_amount = 0; -+ int device_status = DeviceStatus; -+ unsigned char color_r[256]; -+ unsigned char color_g[256]; -+ unsigned char color_b[256]; -+ -+ for (i = 0; i < sizeof(DeviceStatus) * 8; i++) { -+ if (device_status & 1) -+ active_device_amount++; -+ device_status >>= 1; -+ } -+ -+ for (i = 0; i < 256; i++) { -+ color_r[i] = gamma_table[i] >> 16; -+ color_g[i] = (gamma_table[i] >> 8) & 0x00FF; -+ color_b[i] = gamma_table[i] & 0x000000FF; -+ } -+ -+ /* 8 bpp mode can't adjust gamma */ -+ if (!(bpp == 8)) { -+ /* Enable Gamma */ -+ switch (chip_info.gfx_chip_name) { -+ case UNICHROME_CLE266: -+ case UNICHROME_K400: -+ write_reg_mask(SR16, VIASR, 0x80, BIT7); -+ break; -+ -+ case UNICHROME_K800: -+ case UNICHROME_PM800: -+ case UNICHROME_CN700: -+ case UNICHROME_CX700: -+ case UNICHROME_K8M890: -+ case UNICHROME_P4M890: -+ case UNICHROME_P4M900: -+ write_reg_mask(CR33, VIACR, 0x80, BIT7); -+ break; -+ } -+ sr1a = (unsigned int)read_reg(VIASR, SR1A); -+ write_reg_mask(SR1A, VIASR, 0x0, BIT0); -+ -+ /* Fill IGA1 Gamma Table */ -+ outb(0, LUT_INDEX_WRITE); -+ for (i = 0; i < 256; i++) { -+ outb(color_r[i], LUT_DATA); -+ outb(color_g[i], LUT_DATA); -+ outb(color_b[i], LUT_DATA); -+ } -+ -+ /* If adjust Gamma value in SAMM, fill IGA1, -+ IGA2 Gamma table simultanous. */ -+ /* Switch to IGA2 Gamma Table */ -+ if ((active_device_amount > 1) && -+ !((chip_info.gfx_chip_name == UNICHROME_CLE266) && -+ (chip_info.gfx_chip_revision < 15))) { -+ write_reg_mask(SR1A, VIASR, 0x01, BIT0); -+ write_reg_mask(CR6A, VIACR, 0x02, BIT1); -+ -+ /* Fill IGA2 Gamma Table */ -+ outb(0, LUT_INDEX_WRITE); -+ for (i = 0; i < 256; i++) { -+ outb(color_r[i], LUT_DATA); -+ outb(color_g[i], LUT_DATA); -+ outb(color_b[i], LUT_DATA); -+ } -+ } -+ write_reg(SR1A, VIASR, sr1a); -+ } -+} -+ -+void get_gamma_table(unsigned int *gamma_table) -+{ -+ unsigned char color_r[256]; -+ unsigned char color_g[256]; -+ unsigned char color_b[256]; -+ unsigned char sr1a = 0; -+ int i; -+ -+ /* Enable Gamma */ -+ switch (chip_info.gfx_chip_name) { -+ case UNICHROME_CLE266: -+ case UNICHROME_K400: -+ write_reg_mask(SR16, VIASR, 0x80, BIT7); -+ break; -+ -+ case UNICHROME_K800: -+ case UNICHROME_PM800: -+ case UNICHROME_CN700: -+ case UNICHROME_CX700: -+ case UNICHROME_K8M890: -+ case UNICHROME_P4M890: -+ case UNICHROME_P4M900: -+ write_reg_mask(CR33, VIACR, 0x80, BIT7); -+ break; -+ } -+ sr1a = read_reg(VIASR, SR1A); -+ write_reg_mask(SR1A, VIASR, 0x0, BIT0); -+ -+ /* Reading gamma table to get color value */ -+ outb(0, LUT_INDEX_READ); -+ for (i = 0; i < 256; i++) { -+ color_r[i] = inb(LUT_DATA); -+ color_g[i] = inb(LUT_DATA); -+ color_b[i] = inb(LUT_DATA); -+ gamma_table[i] = -+ ((((u32) color_r[i]) << 16) | -+ (((u16) color_g[i]) << 8)) | color_b[i]; -+ } -+ write_reg(SR1A, VIASR, sr1a); -+} -+ -+void get_gamma_support_state(int bpp, unsigned int *support_state) -+{ -+ if (bpp == 8) -+ *support_state = None_Device; -+ else -+ *support_state = CRT_Device | DVI_Device | LCD_Device; -+} -+ -+int input_parameter_converter(int parameter_value) -+{ -+ int result; -+ -+ switch (parameter_value) { -+ case 1: -+ result = 0x01; -+ break; -+ -+ case 2: -+ result = 0x02; -+ break; -+ -+ case 3: -+ result = 0x04; -+ break; -+ -+ case 4: -+ result = 0x08; -+ break; -+ -+ case 5: -+ result = 0x10; -+ break; -+ -+ case 6: -+ result = 0x20; -+ break; -+ -+ case 7: -+ result = 0x40; -+ break; -+ -+ case 8: -+ result = 0x80; -+ break; -+ -+ case 9: -+ result = 0x100; -+ break; -+ -+ default: -+ result = 0x01; -+ break; -+ } -+ -+ return result; -+} ---- /dev/null -+++ b/drivers/video/viafb/via_utility.h -@@ -0,0 +1,35 @@ -+/* -+ * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. -+ * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. -+ -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published -+ * by the Free Software Foundation; either version 2, or (at your option) -+ * any later version. -+ -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even -+ * the implied warranty of MERCHANTABILITY or FITNESS FOR -+ * A PARTICULAR PURPOSE.See the GNU General Public License -+ * for more details. -+ -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., -+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -+ */ -+#ifndef __VIAUTILITY_H__ -+#define __VIAUTILITY_H__ -+ -+/* These functions are used to get infomation about device's state */ -+void get_device_support_state(u32 *support_state); -+void get_device_connect_state(u32 *connect_state); -+bool lcd_get_support_expand_state(u32 xres, u32 yres); -+ -+/* These function are used to access gamma table */ -+void set_gamma_table(int bpp, unsigned int *gamma_table); -+void get_gamma_table(unsigned int *gamma_table); -+void get_gamma_support_state(int bpp, unsigned int *support_state); -+int input_parameter_converter(int parameter_value); -+ -+#endif /* __VIAUTILITY_H__ */ ---- /dev/null +++ b/drivers/video/viafb/vt1636.c @@ -0,0 +1,317 @@ +/* |