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| author | Mark Brown <broonie@kernel.org> | 2026-05-29 18:09:10 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2026-05-29 18:09:10 +0100 |
| commit | 178636b2f2b6f8ed97733c28f99de2ea79b5bb6c (patch) | |
| tree | 5c316a5df47c39cffcc2e7c8eceeb93bebf7d9b4 | |
| parent | d668848e9d7fc23918835b741cc350cddb14b483 (diff) | |
| parent | 5117b7d68fdc90a26d35c82766b3894ca9a196c3 (diff) | |
| download | linux-next-history-178636b2f2b6f8ed97733c28f99de2ea79b5bb6c.tar.gz | |
Merge branch 'for-next' of https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git
13 files changed, 132 insertions, 14 deletions
diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml index 206686f3eebce..0b418d9d60dbd 100644 --- a/Documentation/devicetree/bindings/arm/altera.yaml +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -111,10 +111,17 @@ properties: - enum: - intel,socfpga-agilex5-socdk - intel,socfpga-agilex5-socdk-013b + - intel,socfpga-agilex5-socdk-debug - intel,socfpga-agilex5-socdk-modular - intel,socfpga-agilex5-socdk-nand - const: intel,socfpga-agilex5 + - description: Agilex7m boards + items: + - enum: + - altr,socfpga-agilex7m-socdk + - const: altr,socfpga-agilex7m + - description: SoCFPGA VT items: - const: altr,socfpga-vt diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi index 5dc8d33e8ad73..98cb4cad2a100 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi @@ -37,13 +37,11 @@ }; }; - pmu: pmu@ff111000 { + pmu: pmu { compatible = "arm,cortex-a9-pmu"; interrupt-parent = <&intc>; interrupts = <0 176 4>, <0 177 4>; interrupt-affinity = <&cpu0>, <&cpu1>; - reg = <0xff111000 0x1000>, - <0xff113000 0x1000>; }; intc: interrupt-controller@fffed000 { diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi index a53a94678df2e..ba4c0ca897883 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi @@ -29,13 +29,11 @@ }; }; - pmu: pmu@ff111000 { + pmu: pmu { compatible = "arm,cortex-a9-pmu"; interrupt-parent = <&intc>; interrupts = <0 124 4>, <0 125 4>; interrupt-affinity = <&cpu0>, <&cpu1>; - reg = <0xff111000 0x1000>, - <0xff113000 0x1000>; }; intc: interrupt-controller@ffffd000 { diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_socdk_nand.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_socdk_nand.dts index a662df319a840..5f9b98b0b393a 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_socdk_nand.dts +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_socdk_nand.dts @@ -18,9 +18,9 @@ label = "Boot and fpga data"; reg = <0x0 0x02500000>; }; - partition@1c00000 { + partition@2500000 { label = "Root Filesystem - JFFS2"; - reg = <0x02500000 0x05500000>; + reg = <0x02500000 0x3db00000>; }; }; }; diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c index 201191cf68f32..349e6c54518e5 100644 --- a/arch/arm/mach-socfpga/platsmp.c +++ b/arch/arm/mach-socfpga/platsmp.c @@ -78,6 +78,7 @@ static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus) } socfpga_scu_base_addr = of_iomap(np, 0); + of_node_put(np); if (!socfpga_scu_base_addr) return; scu_enable(socfpga_scu_base_addr); diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile index 33fcc55d0cb96..088a03b89c995 100644 --- a/arch/arm64/boot/dts/intel/Makefile +++ b/arch/arm64/boot/dts/intel/Makefile @@ -8,5 +8,6 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_n6000.dtb \ socfpga_agilex5_socdk_013b.dtb \ socfpga_agilex5_socdk_modular.dtb \ socfpga_agilex5_socdk_nand.dtb \ + socfpga_agilex7m_socdk.dtb \ socfpga_n5x_socdk.dtb dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts index 14b299f19f3a5..25e17df0cbdbd 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts @@ -12,6 +12,8 @@ aliases { serial0 = &uart0; ethernet2 = &gmac2; + i3c0 = &i3c0; + i3c1 = &i3c1; }; chosen { diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi index 02e62d954e949..b06c6d5d60eed 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi @@ -343,7 +343,7 @@ #dma-cells = <1>; dma-channels = <4>; snps,dma-masters = <1>; - snps,data-width = <2>; + snps,data-width = <3>; snps,block-size = <32767 32767 32767 32767>; snps,priority = <0 1 2 3>; snps,axi-max-burst-len = <8>; @@ -362,7 +362,7 @@ #dma-cells = <1>; dma-channels = <4>; snps,dma-masters = <1>; - snps,data-width = <2>; + snps,data-width = <3>; snps,block-size = <32767 32767 32767 32767>; snps,priority = <0 1 2 3>; snps,axi-max-burst-len = <8>; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts index 262bb3e8e5c72..57d3c5807c65c 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts @@ -13,6 +13,8 @@ ethernet0 = &gmac0; ethernet1 = &gmac1; ethernet2 = &gmac2; + i3c0 = &i3c0; + i3c1 = &i3c1; }; chosen { @@ -42,7 +44,7 @@ &gmac2 { status = "okay"; - phy-mode = "rgmii-id"; + phy-mode = "rgmii"; /* TX/RX clock delays provided by Agilex5 I/O hardware */ phy-handle = <&emac2_phy0>; max-frame-size = <9000>; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts index f71e1280c7788..82cd4115746ec 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts @@ -11,6 +11,8 @@ aliases { serial0 = &uart0; ethernet2 = &gmac2; + i3c0 = &i3c0; + i3c1 = &i3c1; }; chosen { @@ -41,7 +43,7 @@ &gmac2 { status = "okay"; - phy-mode = "rgmii-id"; + phy-mode = "rgmii"; /* TX/RX clock delays provided by Agilex5 I/O hardware */ phy-handle = <&emac2_phy0>; max-frame-size = <9000>; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts index 1831402d88082..4d32b6928ce17 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts @@ -11,6 +11,8 @@ aliases { serial0 = &uart0; ethernet2 = &gmac2; + i3c0 = &i3c0; + i3c1 = &i3c1; }; chosen { @@ -44,7 +46,7 @@ &gmac2 { status = "okay"; - phy-mode = "rgmii-id"; + phy-mode = "rgmii"; /* TX/RX clock delays provided by Agilex5 I/O hardware */ phy-handle = <&emac2_phy0>; max-frame-size = <9000>; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts index ec4541d44c9bc..81443096cf991 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts @@ -11,6 +11,8 @@ aliases { serial0 = &uart0; ethernet0 = &gmac0; + i3c0 = &i3c0; + i3c1 = &i3c1; }; chosen { @@ -39,7 +41,7 @@ &gmac0 { status = "okay"; - phy-mode = "rgmii-id"; + phy-mode = "rgmii"; /* TX/RX clock delays provided by Agilex5 I/O hardware */ phy-handle = <&emac0_phy0>; max-frame-size = <9000>; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex7m_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex7m_socdk.dts new file mode 100644 index 0000000000000..c1f270b9334cd --- /dev/null +++ b/arch/arm64/boot/dts/intel/socfpga_agilex7m_socdk.dts @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2026 Altera Corporation + +#include "socfpga_agilex.dtsi" + +/ { + model = "Altera SoCFPGA Agilex7-M SoCDK"; + compatible = "altr,socfpga-agilex7m-socdk", + "altr,socfpga-agilex7m"; + + aliases { + serial0 = &uart0; + ethernet0 = &gmac0; + ethernet1 = &gmac1; + ethernet2 = &gmac2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + led-0 { + label = "hps_led0"; + gpios = <&portb 20 GPIO_ACTIVE_HIGH>; + }; + + led-1 { + label = "hps_led1"; + gpios = <&portb 19 GPIO_ACTIVE_HIGH>; + }; + + led-2 { + label = "hps_led2"; + gpios = <&portb 21 GPIO_ACTIVE_HIGH>; + }; + }; + + memory@80000000 { + device_type = "memory"; + /* We expect the bootloader to fill in the reg */ + reg = <0 0x80000000 0 0>; + }; +}; + +&gpio1 { + status = "okay"; +}; + +&gmac0 { + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <&phy0>; + + max-frame-size = <9000>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy0: ethernet-phy@4 { + reg = <4>; + + txd0-skew-ps = <0>; /* -420ps */ + txd1-skew-ps = <0>; /* -420ps */ + txd2-skew-ps = <0>; /* -420ps */ + txd3-skew-ps = <0>; /* -420ps */ + rxd0-skew-ps = <420>; /* 0ps */ + rxd1-skew-ps = <420>; /* 0ps */ + rxd2-skew-ps = <420>; /* 0ps */ + rxd3-skew-ps = <420>; /* 0ps */ + txen-skew-ps = <0>; /* -420ps */ + txc-skew-ps = <900>; /* 0ps */ + rxdv-skew-ps = <420>; /* 0ps */ + rxc-skew-ps = <1680>; /* 780ps */ + }; + }; +}; + +&mmc { + status = "okay"; + cap-sd-highspeed; + broken-cd; + bus-width = <4>; + clk-phase-sd-hs = <0>, <135>; +}; + +&osc1 { + clock-frequency = <25000000>; +}; + +&uart0 { + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; + +&watchdog0 { + status = "okay"; +}; |
