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authorMark Brown <broonie@kernel.org>2026-05-29 18:08:47 +0100
committerMark Brown <broonie@kernel.org>2026-05-29 18:08:47 +0100
commitc0cbe6afe4e5933778014561d5f9f10cbcc1e63e (patch)
tree51ba5baae3115c813b0dc17e11a3f8db17a3843b /Documentation
parentedab04af1fb7cfb83d27ae39bbeb2c52c1c000be (diff)
parentbe0cd82a9f584e562b243684303054134c8f6583 (diff)
downloadlinux-next-history-c0cbe6afe4e5933778014561d5f9f10cbcc1e63e.tar.gz
Merge branch 'for-next' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/arm/qcom.yaml21
-rw-r--r--Documentation/devicetree/bindings/cache/qcom,llcc.yaml43
-rw-r--r--Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml17
-rw-r--r--Documentation/devicetree/bindings/clock/qcom,hawi-gcc.yaml63
-rw-r--r--Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml1
-rw-r--r--Documentation/devicetree/bindings/clock/qcom,ipq9650-gcc.yaml68
-rw-r--r--Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml2
-rw-r--r--Documentation/devicetree/bindings/clock/qcom,milos-gxclkctl.yaml61
-rw-r--r--Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml1
-rw-r--r--Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml2
-rw-r--r--Documentation/devicetree/bindings/firmware/qcom,scm.yaml3
-rw-r--r--Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6855-bt.yaml7
-rw-r--r--Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml2
-rw-r--r--Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml6
-rw-r--r--Documentation/devicetree/bindings/soc/qcom/qcom,sa8255p-geni-se-qup.yaml31
15 files changed, 302 insertions, 26 deletions
diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index b4943123d2e42..50cc18a6ec5ed 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -79,6 +79,7 @@ properties:
- items:
- enum:
- fairphone,fp6
+ - nothing,asteroids
- const: qcom,milos
- items:
@@ -367,6 +368,11 @@ properties:
- items:
- enum:
+ - qcom,ipq9650-rdp488
+ - const: qcom,ipq9650
+
+ - items:
+ - enum:
- qcom,kaanapali-mtp
- qcom,kaanapali-qrd
- const: qcom,kaanapali
@@ -822,6 +828,14 @@ properties:
- const: google,zombie-sku514
- const: qcom,sc7280
+ - description: Xiaomi Poco F1
+ items:
+ - enum:
+ - xiaomi,beryllium-ebbg
+ - xiaomi,beryllium-tianma
+ - const: xiaomi,beryllium
+ - const: qcom,sdm845
+
- items:
- enum:
- lenovo,flex-5g
@@ -972,8 +986,6 @@ properties:
- sony,akatsuki-row
- sony,apollo-row
- thundercomm,db845c
- - xiaomi,beryllium
- - xiaomi,beryllium-ebbg
- xiaomi,polaris
- const: qcom,sdm845
@@ -1040,6 +1052,7 @@ properties:
- items:
- enum:
+ - motorola,dubai
- nothing,spacewar
- const: qcom,sm7325
@@ -1169,6 +1182,10 @@ properties:
- const: qcom,x1e80100
- items:
+ - const: microsoft,surface-pro-12in
+ - const: qcom,x1p42100
+
+ - items:
- enum:
- qcom,purwa-iot-evk
- const: qcom,purwa-iot-som
diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
index 995d578157810..34e3a2d785927 100644
--- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
+++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
@@ -20,7 +20,9 @@ description: |
properties:
compatible:
enum:
+ - qcom,eliza-llcc
- qcom,glymur-llcc
+ - qcom,hawi-llcc
- qcom,ipq5424-llcc
- qcom,kaanapali-llcc
- qcom,qcs615-llcc
@@ -35,6 +37,7 @@ properties:
- qcom,sc8280xp-llcc
- qcom,sdm670-llcc
- qcom,sdm845-llcc
+ - qcom,shikra-llcc
- qcom,sm6350-llcc
- qcom,sm7150-llcc
- qcom,sm8150-llcc
@@ -57,6 +60,11 @@ properties:
interrupts:
maxItems: 1
+ memory-region:
+ maxItems: 1
+ description: handle to a reserved-memory node used for firmware-populated
+ SLC/SCT shared memory.
+
nvmem-cells:
items:
- description: Reference to an nvmem node for multi channel DDR
@@ -206,6 +214,7 @@ allOf:
enum:
- qcom,sc7280-llcc
- qcom,sdm670-llcc
+ - qcom,shikra-llcc
then:
properties:
reg:
@@ -318,6 +327,7 @@ allOf:
contains:
enum:
- qcom,kaanapali-llcc
+ - qcom,hawi-llcc
- qcom,sm8450-llcc
- qcom,sm8550-llcc
- qcom,sm8650-llcc
@@ -340,6 +350,39 @@ allOf:
- const: llcc3_base
- const: llcc_broadcast_base
- const: llcc_broadcast_and_base
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,hawi-llcc
+ then:
+ required:
+ - memory-region
+ else:
+ properties:
+ memory-region: false
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,eliza-llcc
+ then:
+ properties:
+ reg:
+ items:
+ - description: LLCC0 base register region
+ - description: LLCC2 base register region
+ - description: LLCC broadcast OR register region
+ - description: LLCC broadcast AND register region
+ reg-names:
+ items:
+ - const: llcc0_base
+ - const: llcc2_base
+ - const: llcc_broadcast_base
+ - const: llcc_broadcast_and_base
additionalProperties: false
diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml
index ef2b1e2044309..a177a1934b19f 100644
--- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml
@@ -42,12 +42,6 @@ properties:
- const: cfg_ahb_clk
- const: gcc_disp_gpll0_div_clk_src
- '#clock-cells':
- const: 1
-
- '#power-domain-cells':
- const: 1
-
power-domains:
description:
A phandle and PM domain specifier for the CX power domain.
@@ -58,18 +52,16 @@ properties:
A phandle to an OPP node describing the power domain's performance point.
maxItems: 1
- reg:
- maxItems: 1
-
required:
- compatible
- - reg
- clocks
- clock-names
- - '#clock-cells'
- '#power-domain-cells'
-additionalProperties: false
+allOf:
+ - $ref: qcom,gcc.yaml#
+
+unevaluatedProperties: false
examples:
- |
@@ -101,6 +93,7 @@ examples:
power-domains = <&rpmpd SM6125_VDDCX>;
#clock-cells = <1>;
+ #reset-cells = <1>;
#power-domain-cells = <1>;
};
...
diff --git a/Documentation/devicetree/bindings/clock/qcom,hawi-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,hawi-gcc.yaml
new file mode 100644
index 0000000000000..4f428c0f7286e
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,hawi-gcc.yaml
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,hawi-gcc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Global Clock & Reset Controller on Hawi
+
+maintainers:
+ - Vivek Aknurwar <vivek.aknurwar@oss.qualcomm.com>
+
+description: |
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on Hawi.
+
+ See also: include/dt-bindings/clock/qcom,hawi-gcc.h
+
+properties:
+ compatible:
+ const: qcom,hawi-gcc
+
+ clocks:
+ items:
+ - description: Board XO source
+ - description: Board Always On XO source
+ - description: Sleep clock source
+ - description: PCIE 0 Pipe clock source
+ - description: PCIE 1 Pipe clock source
+ - description: UFS PHY RX symbol 0 clock
+ - description: UFS PHY RX symbol 1 clock
+ - description: UFS PHY TX symbol 0 clock
+ - description: USB3 PHY wrapper pipe clock
+
+required:
+ - compatible
+ - clocks
+ - '#power-domain-cells'
+
+allOf:
+ - $ref: qcom,gcc.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,rpmh.h>
+ clock-controller@100000 {
+ compatible = "qcom,hawi-gcc";
+ reg = <0x00100000 0x1f4200>;
+ clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&rpmhcc RPMH_CXO_CLK_A>,
+ <&sleep_clk>,
+ <&pcie0_phy>,
+ <&pcie1_phy>,
+ <&ufs_mem_phy 0>,
+ <&ufs_mem_phy 1>,
+ <&ufs_mem_phy 2>,
+ <&usb_1_qmpphy>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml
index de338c05190fb..b9c3650e5c4cb 100644
--- a/Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml
@@ -25,6 +25,7 @@ properties:
compatible:
enum:
- qcom,ipq5018-cmn-pll
+ - qcom,ipq5332-cmn-pll
- qcom,ipq5424-cmn-pll
- qcom,ipq6018-cmn-pll
- qcom,ipq8074-cmn-pll
diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq9650-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq9650-gcc.yaml
new file mode 100644
index 0000000000000..f33105217a062
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,ipq9650-gcc.yaml
@@ -0,0 +1,68 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,ipq9650-gcc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Global Clock & Reset Controller on IPQ9650
+
+maintainers:
+ - Bjorn Andersson <andersson@kernel.org>
+ - Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
+
+description: |
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on IPQ9650
+
+ See also:
+ include/dt-bindings/clock/qcom,ipq9650-gcc.h
+ include/dt-bindings/reset/qcom,ipq9650-gcc.h
+
+properties:
+ compatible:
+ const: qcom,ipq9650-gcc
+
+ clocks:
+ items:
+ - description: Board XO source
+ - description: Sleep clock source
+ - description: PCIE30 PHY0 pipe clock source
+ - description: PCIE30 PHY1 pipe clock source
+ - description: PCIE30 PHY2 pipe clock source
+ - description: PCIE30 PHY3 pipe clock source
+ - description: PCIE30 PHY4 pipe clock source
+ - description: USB PCIE wrapper pipe clock source
+ - description: NSS common clock source
+
+ '#power-domain-cells': false
+
+ '#interconnect-cells':
+ const: 1
+
+required:
+ - compatible
+ - clocks
+
+allOf:
+ - $ref: qcom,gcc.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ clock-controller@1800000 {
+ compatible = "qcom,ipq9650-gcc";
+ reg = <0x01800000 0x40000>;
+ clocks = <&xo_board_clk>,
+ <&sleep_clk>,
+ <&pcie30_phy0_pipe_clk>,
+ <&pcie30_phy1_pipe_clk>,
+ <&pcie30_phy2_pipe_clk>,
+ <&pcie30_phy3_pipe_clk>,
+ <&pcie30_phy4_pipe_clk>,
+ <&usb3phy_0_cc_pipe_clk>,
+ <&nss_cmn_clk>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml b/Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml
index 466c884aa2bab..e868963f659b6 100644
--- a/Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml
@@ -44,7 +44,7 @@ required:
- power-domains
- '#power-domain-cells'
-unevaluatedProperties: false
+additionalProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/clock/qcom,milos-gxclkctl.yaml b/Documentation/devicetree/bindings/clock/qcom,milos-gxclkctl.yaml
new file mode 100644
index 0000000000000..fbcb5d3f3e3d1
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,milos-gxclkctl.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,milos-gxclkctl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Graphics Power Domain Controller on Milos
+
+maintainers:
+ - Luca Weiss <luca.weiss@fairphone.com>
+
+description: |
+ Qualcomm GX(graphics) is a clock controller which has PLLs, clocks and
+ Power domains (GDSC). This module provides the power domains control
+ of gxclkctl on Qualcomm SoCs which helps the recovery of Graphics subsystem.
+
+ See also:
+ include/dt-bindings/clock/qcom,kaanapali-gxclkctl.h
+
+properties:
+ compatible:
+ enum:
+ - qcom,milos-gxclkctl
+
+ reg:
+ maxItems: 1
+
+ power-domains:
+ description:
+ Power domains required for the clock controller to operate
+ items:
+ - description: GFX power domain
+ - description: GPUCC(CX) power domain
+
+ '#power-domain-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - power-domains
+ - '#power-domain-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/power/qcom,rpmhpd.h>
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ clock-controller@3d64000 {
+ compatible = "qcom,milos-gxclkctl";
+ reg = <0x0 0x03d64000 0x0 0x6000>;
+ power-domains = <&rpmhpd RPMHPD_GFX>,
+ <&gpucc 0>;
+ #power-domain-cells = <1>;
+ };
+ };
+...
diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml
index a2c404a579812..d344b33860429 100644
--- a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml
@@ -19,6 +19,7 @@ properties:
enum:
- qcom,eliza-rpmh-clk
- qcom,glymur-rpmh-clk
+ - qcom,hawi-rpmh-clk
- qcom,kaanapali-rpmh-clk
- qcom,milos-rpmh-clk
- qcom,nord-rpmh-clk
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml
index 1ccdf4b0f5dd3..08824f8489735 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml
@@ -17,6 +17,7 @@ description: |
See also:
- include/dt-bindings/clock/qcom,eliza-tcsr.h
- include/dt-bindings/clock/qcom,glymur-tcsr.h
+ - include/dt-bindings/clock/qcom,hawi-tcsrcc.h
- include/dt-bindings/clock/qcom,nord-tcsrcc.h
- include/dt-bindings/clock/qcom,sm8550-tcsr.h
- include/dt-bindings/clock/qcom,sm8650-tcsr.h
@@ -28,6 +29,7 @@ properties:
- enum:
- qcom,eliza-tcsr
- qcom,glymur-tcsr
+ - qcom,hawi-tcsrcc
- qcom,kaanapali-tcsr
- qcom,milos-tcsr
- qcom,nord-tcsrcc
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
index 7918d31f58b4a..25f62bacbc919 100644
--- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
+++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
@@ -25,6 +25,7 @@ properties:
- qcom,scm-apq8084
- qcom,scm-eliza
- qcom,scm-glymur
+ - qcom,scm-hawi
- qcom,scm-ipq4019
- qcom,scm-ipq5018
- qcom,scm-ipq5210
@@ -49,6 +50,7 @@ properties:
- qcom,scm-msm8994
- qcom,scm-msm8996
- qcom,scm-msm8998
+ - qcom,scm-nord
- qcom,scm-qcm2290
- qcom,scm-qcs615
- qcom,scm-qcs8300
@@ -208,6 +210,7 @@ allOf:
contains:
enum:
- qcom,scm-eliza
+ - qcom,scm-hawi
- qcom,scm-kaanapali
- qcom,scm-milos
- qcom,scm-sm8450
diff --git a/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6855-bt.yaml b/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6855-bt.yaml
index 45630067d3c8e..0beda26ae8bb4 100644
--- a/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6855-bt.yaml
+++ b/Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6855-bt.yaml
@@ -50,9 +50,6 @@ properties:
description: VDD_RFA_1P7 supply regulator handle
deprecated: true
- vddrfa1p8-supply:
- description: VDD_RFA_1P8 supply regulator handle
-
vddrfacmn-supply:
description: VDD_RFA_CMN supply regulator handle
@@ -68,7 +65,7 @@ required:
- vddbtcmx-supply
- vddrfa0p8-supply
- vddrfa1p2-supply
- - vddrfa1p8-supply
+ - vddrfa1p7-supply
- vddrfacmn-supply
- vddwlcx-supply
- vddwlmx-supply
@@ -91,7 +88,7 @@ examples:
vddbtcmx-supply = <&vreg_pmu_btcmx_0p8>;
vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
- vddrfa1p8-supply = <&vreg_pmu_rfa_1p7>;
+ vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>;
vddrfacmn-supply = <&vreg_pmu_rfa_cmn_0p8>;
vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
vddwlmx-supply = <&vreg_pmu_wlmx_0p8>;
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
index c5c1bac2db013..8eaa04431d745 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
@@ -25,7 +25,9 @@ properties:
compatible:
items:
- enum:
+ - qcom,eliza-aoss-qmp
- qcom,glymur-aoss-qmp
+ - qcom,hawi-aoss-qmp
- qcom,kaanapali-aoss-qmp
- qcom,milos-aoss-qmp
- qcom,qcs615-aoss-qmp
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
index ff01d2f3ee5be..2db4288a8a54a 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
@@ -34,11 +34,17 @@ properties:
- const: qcom,pmic-glink
- items:
- enum:
+ - qcom,hawi-pmic-glink
+ - const: qcom,kaanapali-pmic-glink
+ - const: qcom,pmic-glink
+ - items:
+ - enum:
- qcom,sm7325-pmic-glink
- const: qcom,qcm6490-pmic-glink
- const: qcom,pmic-glink
- items:
- enum:
+ - qcom,eliza-pmic-glink
- qcom,milos-pmic-glink
- qcom,sm8650-pmic-glink
- qcom,sm8750-pmic-glink
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,sa8255p-geni-se-qup.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,sa8255p-geni-se-qup.yaml
index 352af3426d344..9c38ba59662b7 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,sa8255p-geni-se-qup.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,sa8255p-geni-se-qup.yaml
@@ -19,7 +19,11 @@ description:
properties:
compatible:
- const: qcom,sa8255p-geni-se-qup
+ oneOf:
+ - const: qcom,sa8255p-geni-se-qup
+ - items:
+ - const: qcom,sa8797p-geni-se-qup
+ - const: qcom,sa8255p-geni-se-qup
reg:
description: QUP wrapper common register address and length.
@@ -49,7 +53,11 @@ patternProperties:
properties:
compatible:
- const: qcom,sa8255p-geni-spi
+ oneOf:
+ - const: qcom,sa8255p-geni-spi
+ - items:
+ - const: qcom,sa8797p-geni-spi
+ - const: qcom,sa8255p-geni-spi
"i2c@[0-9a-f]+$":
type: object
@@ -58,7 +66,11 @@ patternProperties:
properties:
compatible:
- const: qcom,sa8255p-geni-i2c
+ oneOf:
+ - const: qcom,sa8255p-geni-i2c
+ - items:
+ - const: qcom,sa8797p-geni-i2c
+ - const: qcom,sa8255p-geni-i2c
"serial@[0-9a-f]+$":
type: object
@@ -67,9 +79,16 @@ patternProperties:
properties:
compatible:
- enum:
- - qcom,sa8255p-geni-uart
- - qcom,sa8255p-geni-debug-uart
+ oneOf:
+ - enum:
+ - qcom,sa8255p-geni-uart
+ - qcom,sa8255p-geni-debug-uart
+ - items:
+ - const: qcom,sa8797p-geni-uart
+ - const: qcom,sa8255p-geni-uart
+ - items:
+ - const: qcom,sa8797p-geni-debug-uart
+ - const: qcom,sa8255p-geni-debug-uart
required:
- compatible