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authorCaleb James DeLisle <cjd@cjdns.fr>2026-04-25 17:36:41 +0000
committerVinod Koul <vkoul@kernel.org>2026-05-14 21:15:16 +0530
commit2cc066dbd3a211628b40967949cff2790d0f62eb (patch)
treead18a34426101a862b78bdc475da8bf5c2f88be7 /MAINTAINERS
parent864b3617df827865a95a06f06f09a8d57a795b91 (diff)
downloadlinux-next-history-2cc066dbd3a211628b40967949cff2790d0f62eb.tar.gz
dt-bindings: phy: Document PCIe PHY in EcoNet EN751221 and EN7528
EN751221 and EN7528 SoCs have two PCIe slots, and each one has a PHY which behaves slightly differently because one slot is Gen1/Gen2 while the other is Gen1 only. Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260425173642.406089-2-cjd@cjdns.fr Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'MAINTAINERS')
-rw-r--r--MAINTAINERS6
1 files changed, 6 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 421dd786b399a..e6e729b13de2f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9153,6 +9153,12 @@ F: drivers/irqchip/irq-econet-en751221.c
F: include/dt-bindings/clock/econet,en751221-scu.h
F: include/dt-bindings/reset/econet,en751221-scu.h
+ECONET PCIE PHY DRIVER
+M: Caleb James DeLisle <cjd@cjdns.fr>
+L: linux-mips@vger.kernel.org
+S: Maintained
+F: Documentation/devicetree/bindings/phy/econet,en751221-pcie-phy.yaml
+
ECRYPT FILE SYSTEM
M: Tyler Hicks <code@tyhicks.com>
L: ecryptfs@vger.kernel.org