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| author | Heiko Stuebner <heiko@sntech.de> | 2026-05-26 23:20:58 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2026-05-26 23:20:58 +0200 |
| commit | 18e36d4e391be0cf96365ff87c1bc136ced0d248 (patch) | |
| tree | 31a022ad7b0bf58a4d885e8836ceb14e5a2c7872 /arch | |
| parent | 2e030c87599d15d364d1c9a2c0198151e09c3a2a (diff) | |
| parent | 6fc5666aa576c6c3bec256fa31d72653210319d5 (diff) | |
| download | linux-next-history-18e36d4e391be0cf96365ff87c1bc136ced0d248.tar.gz | |
Merge branch 'v7.1-armsoc/arm32-fixes' into for-next
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-rockchip/platsmp.c | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c index f432d22bfed84..f659d894bfae4 100644 --- a/arch/arm/mach-rockchip/platsmp.c +++ b/arch/arm/mach-rockchip/platsmp.c @@ -34,6 +34,7 @@ static int ncores; static struct regmap *pmu; static int has_pmu = true; +static struct reset_control *cpu_rstc[4]; static int pmu_power_domain_is_on(int pd) { @@ -64,9 +65,11 @@ static struct reset_control *rockchip_get_core_reset(int cpu) static int pmu_set_power_domain(int pd, bool on) { u32 val = (on) ? 0 : BIT(pd); - struct reset_control *rstc = rockchip_get_core_reset(pd); + struct reset_control *rstc; int ret; + rstc = pd < ARRAY_SIZE(cpu_rstc) ? cpu_rstc[pd] : ERR_PTR(-EINVAL); + if (IS_ERR(rstc) && read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) { pr_err("%s: could not get reset control for core %d\n", __func__, pd); @@ -100,11 +103,8 @@ static int pmu_set_power_domain(int pd, bool on) } } - if (!IS_ERR(rstc)) { - if (on) - reset_control_deassert(rstc); - reset_control_put(rstc); - } + if (!IS_ERR(rstc) && on) + reset_control_deassert(rstc); return 0; } @@ -312,6 +312,10 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus) ncores = ((l2ctlr >> 24) & 0x3) + 1; } + /* Collect cpu core reset control for each core */ + for (i = 0; i < ncores; i++) + cpu_rstc[i] = rockchip_get_core_reset(i); + /* Make sure that all cores except the first are really off */ for (i = 1; i < ncores; i++) pmu_set_power_domain(0 + i, false); |