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| author | Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com> | 2026-04-08 12:37:04 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-05-29 14:53:30 +0200 |
| commit | 4f2dc292dcde87b6e402158dc6df5f1d9a83e47f (patch) | |
| tree | 8f98169598fac6f7cdb0ff07c50b4a21104bc639 /arch | |
| parent | d653f310c805932b5f5196f01c1ba52475d9c85c (diff) | |
| download | linux-next-history-4f2dc292dcde87b6e402158dc6df5f1d9a83e47f.tar.gz | |
arm64: dts: renesas: r9a09g047: Add vspd{0,1} nodes
Add vspd{0,1} nodes to the RZ/G3E SoC DTSI.
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://patch.msgid.link/46547aaff3cdb8ea6e17cf1fdec699d83a1cd71b.1775636898.git.tommaso.merciai.xr@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi index 92a3491fb7eac..b48da8534a3df 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi @@ -1609,6 +1609,34 @@ resets = <&cpg 0x11e>; power-domains = <&cpg>; }; + + vspd0: vsp@16480000 { + compatible = "renesas,r9a09g047-vsp2", + "renesas,r9a07g044-vsp2"; + reg = <0 0x16480000 0 0x10000>; + interrupts = <GIC_SPI 881 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 0xed>, + <&cpg CPG_MOD 0xee>, + <&cpg CPG_MOD 0xef>; + clock-names = "aclk", "pclk", "vclk"; + resets = <&cpg 0xdc>; + power-domains = <&cpg>; + renesas,fcp = <&fcpvd0>; + }; + + vspd1: vsp@164b0000 { + compatible = "renesas,r9a09g047-vsp2", + "renesas,r9a07g044-vsp2"; + reg = <0 0x164b0000 0 0x10000>; + interrupts = <GIC_SPI 921 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 0x1a8>, + <&cpg CPG_MOD 0x1a9>, + <&cpg CPG_MOD 0x1aa>; + clock-names = "aclk", "pclk", "vclk"; + resets = <&cpg 0x11e>; + power-domains = <&cpg>; + renesas,fcp = <&fcpvd1>; + }; }; stmmac_axi_setup: stmmac-axi-config { |