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authorFabrizio Castro <fabrizio.castro.jz@renesas.com>2026-05-14 22:02:17 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2026-05-28 15:58:49 +0200
commit5ce87d70b995ab23ba20fe4590d913d46f730b82 (patch)
tree6587615ec935894c5d68af6d997bee59e1c99bb3 /arch
parenteaa551a7cb105dc452107e9b8a5fb6c967017be3 (diff)
downloadlinux-next-history-5ce87d70b995ab23ba20fe4590d913d46f730b82.tar.gz
arm64: dts: renesas: rzt2h-n2h-evk: Configure eMMC/SDHI pins
The HW user manual for the Renesas RZ/T2H and the RZ/N2H states that for SDR104, SDR50, and HS200 to work properly the eMMC/SDHI interface pins have to be configured as specified below: - SDn_CLK pin - drive strength: Ultra High, slew rate: Fast, - Other SDn_* pins: drive strength: High, slew rate: Fast, Schmitt trigger: disabled (not applicable to SDn_RST pins). HS DDR and DDR50 are currently not supported, and for every other bus mode the eMMC/SDHI interface pins should be configured as specified below: - SDn_CLK pin - drive strength: High, slew rate: Fast, - Other SDn_* pins: drive strength: Middle, slew rate: Fast, Schmitt trigger: disabled (not applicable to SDn_RST pins). Adjust the pin definitions accordingly. Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/20260514210220.7616-1-fabrizio.castro.jz@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi147
1 files changed, 136 insertions, 11 deletions
diff --git a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi
index f87c2492f414a..ba0f5d12772c7 100644
--- a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi
@@ -275,12 +275,63 @@
<RZT2H_PORT_PINMUX(12, 7, 0x29)>, /* SD0_DATA5 */
<RZT2H_PORT_PINMUX(13, 0, 0x29)>, /* SD0_DATA6 */
<RZT2H_PORT_PINMUX(13, 1, 0x29)>; /* SD0_DATA7 */
+ drive-strength-microamp = <5000>;
+ slew-rate = <1>;
+ input-schmitt-disable;
};
- ctrl-pins {
- pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>, /* SD0_CLK */
- <RZT2H_PORT_PINMUX(12, 1, 0x29)>, /* SD0_CMD */
- <RZT2H_PORT_PINMUX(13, 2, 0x29)>; /* SD0_RST# */
+ clk-pins {
+ pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>; /* SD0_CLK */
+ drive-strength-microamp = <9000>;
+ slew-rate = <1>;
+ };
+
+ cmd-pins {
+ pinmux = <RZT2H_PORT_PINMUX(12, 1, 0x29)>; /* SD0_CMD */
+ drive-strength-microamp = <5000>;
+ slew-rate = <1>;
+ input-schmitt-disable;
+ };
+
+ rst-pins {
+ pinmux = <RZT2H_PORT_PINMUX(13, 2, 0x29)>; /* SD0_RST# */
+ drive-strength-microamp = <5000>;
+ slew-rate = <1>;
+ };
+ };
+
+ sdhi0_emmc_uhs_pins: sd0-emmc-uhs-group {
+ data-pins {
+ pinmux = <RZT2H_PORT_PINMUX(12, 2, 0x29)>, /* SD0_DATA0 */
+ <RZT2H_PORT_PINMUX(12, 3, 0x29)>, /* SD0_DATA1 */
+ <RZT2H_PORT_PINMUX(12, 4, 0x29)>, /* SD0_DATA2 */
+ <RZT2H_PORT_PINMUX(12, 5, 0x29)>, /* SD0_DATA3 */
+ <RZT2H_PORT_PINMUX(12, 6, 0x29)>, /* SD0_DATA4 */
+ <RZT2H_PORT_PINMUX(12, 7, 0x29)>, /* SD0_DATA5 */
+ <RZT2H_PORT_PINMUX(13, 0, 0x29)>, /* SD0_DATA6 */
+ <RZT2H_PORT_PINMUX(13, 1, 0x29)>; /* SD0_DATA7 */
+ drive-strength-microamp = <9000>;
+ slew-rate = <1>;
+ input-schmitt-disable;
+ };
+
+ clk-pins {
+ pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>; /* SD0_CLK */
+ drive-strength-microamp = <11800>;
+ slew-rate = <1>;
+ };
+
+ cmd-pins {
+ pinmux = <RZT2H_PORT_PINMUX(12, 1, 0x29)>; /* SD0_CMD */
+ drive-strength-microamp = <9000>;
+ slew-rate = <1>;
+ input-schmitt-disable;
+ };
+
+ rst-pins {
+ pinmux = <RZT2H_PORT_PINMUX(13, 2, 0x29)>; /* SD0_RST# */
+ drive-strength-microamp = <9000>;
+ slew-rate = <1>;
};
};
@@ -299,12 +350,49 @@
<RZT2H_PORT_PINMUX(12, 3, 0x29)>, /* SD0_DATA1 */
<RZT2H_PORT_PINMUX(12, 4, 0x29)>, /* SD0_DATA2 */
<RZT2H_PORT_PINMUX(12, 5, 0x29)>; /* SD0_DATA3 */
+ drive-strength-microamp = <5000>;
+ slew-rate = <1>;
+ input-schmitt-disable;
+ };
+
+ clk-pins {
+ pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>; /* SD0_CLK */
+ drive-strength-microamp = <9000>;
+ slew-rate = <1>;
};
ctrl-pins {
- pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>, /* SD0_CLK */
- <RZT2H_PORT_PINMUX(12, 1, 0x29)>, /* SD0_CMD */
+ pinmux = <RZT2H_PORT_PINMUX(12, 1, 0x29)>, /* SD0_CMD */
<RZT2H_PORT_PINMUX(22, 5, 0x29)>; /* SD0_CD */
+ drive-strength-microamp = <5000>;
+ slew-rate = <1>;
+ input-schmitt-disable;
+ };
+ };
+
+ sdhi0_sd_uhs_pins: sd0-sd-uhs-group {
+ data-pins {
+ pinmux = <RZT2H_PORT_PINMUX(12, 2, 0x29)>, /* SD0_DATA0 */
+ <RZT2H_PORT_PINMUX(12, 3, 0x29)>, /* SD0_DATA1 */
+ <RZT2H_PORT_PINMUX(12, 4, 0x29)>, /* SD0_DATA2 */
+ <RZT2H_PORT_PINMUX(12, 5, 0x29)>; /* SD0_DATA3 */
+ drive-strength-microamp = <9000>;
+ slew-rate = <1>;
+ input-schmitt-disable;
+ };
+
+ clk-pins {
+ pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>; /* SD0_CLK */
+ drive-strength-microamp = <11800>;
+ slew-rate = <1>;
+ };
+
+ ctrl-pins {
+ pinmux = <RZT2H_PORT_PINMUX(12, 1, 0x29)>, /* SD0_CMD */
+ <RZT2H_PORT_PINMUX(22, 5, 0x29)>; /* SD0_CD */
+ drive-strength-microamp = <9000>;
+ slew-rate = <1>;
+ input-schmitt-disable;
};
};
@@ -323,12 +411,49 @@
<RZT2H_PORT_PINMUX(17, 0, 0x29)>, /* SD1_DATA1 */
<RZT2H_PORT_PINMUX(17, 1, 0x29)>, /* SD1_DATA2 */
<RZT2H_PORT_PINMUX(17, 2, 0x29)>; /* SD1_DATA3 */
+ drive-strength-microamp = <5000>;
+ slew-rate = <1>;
+ input-schmitt-disable;
+ };
+
+ clk-pins {
+ pinmux = <RZT2H_PORT_PINMUX(16, 5, 0x29)>; /* SD1_CLK */
+ drive-strength-microamp = <9000>;
+ slew-rate = <1>;
+ };
+
+ ctrl-pins {
+ pinmux = <RZT2H_PORT_PINMUX(16, 6, 0x29)>, /* SD1_CMD */
+ <RZT2H_PORT_PINMUX(17, 4, 0x29)>; /* SD1_CD */
+ drive-strength-microamp = <5000>;
+ slew-rate = <1>;
+ input-schmitt-disable;
+ };
+ };
+
+ sdhi1_uhs_pins: sd1-uhs-group {
+ data-pins {
+ pinmux = <RZT2H_PORT_PINMUX(16, 7, 0x29)>, /* SD1_DATA0 */
+ <RZT2H_PORT_PINMUX(17, 0, 0x29)>, /* SD1_DATA1 */
+ <RZT2H_PORT_PINMUX(17, 1, 0x29)>, /* SD1_DATA2 */
+ <RZT2H_PORT_PINMUX(17, 2, 0x29)>; /* SD1_DATA3 */
+ drive-strength-microamp = <9000>;
+ slew-rate = <1>;
+ input-schmitt-disable;
+ };
+
+ clk-pins {
+ pinmux = <RZT2H_PORT_PINMUX(16, 5, 0x29)>; /* SD1_CLK */
+ drive-strength-microamp = <11800>;
+ slew-rate = <1>;
};
ctrl-pins {
- pinmux = <RZT2H_PORT_PINMUX(16, 5, 0x29)>, /* SD1_CLK */
- <RZT2H_PORT_PINMUX(16, 6, 0x29)>, /* SD1_CMD */
+ pinmux = <RZT2H_PORT_PINMUX(16, 6, 0x29)>, /* SD1_CMD */
<RZT2H_PORT_PINMUX(17, 4, 0x29)>; /* SD1_CD */
+ drive-strength-microamp = <9000>;
+ slew-rate = <1>;
+ input-schmitt-disable;
};
};
};
@@ -342,7 +467,7 @@
#if SD0_EMMC
&sdhi0 {
pinctrl-0 = <&sdhi0_emmc_pins>;
- pinctrl-1 = <&sdhi0_emmc_pins>;
+ pinctrl-1 = <&sdhi0_emmc_uhs_pins>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_1p8v>;
@@ -357,7 +482,7 @@
#if SD0_SD
&sdhi0 {
pinctrl-0 = <&sdhi0_sd_pins>;
- pinctrl-1 = <&sdhi0_sd_pins>;
+ pinctrl-1 = <&sdhi0_sd_uhs_pins>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&vqmmc_sdhi0>;
@@ -372,7 +497,7 @@
#if SD1_MICRO_SD
&sdhi1 {
pinctrl-0 = <&sdhi1_pins>;
- pinctrl-1 = <&sdhi1_pins>;
+ pinctrl-1 = <&sdhi1_uhs_pins>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&vccq_sdhi1>;
generated by cgit 1.3-korg (git 2.53.0) at 2026-06-01 04:05:36 +0000