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-rw-r--r--arch/arm64/boot/dts/renesas/r9a08g046.dtsi76
1 files changed, 76 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
index 5f8eb93da3c15..70f820f143353 100644
--- a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
@@ -349,6 +349,82 @@
/* placeholder */
};
+ ssi0: ssi@100e4000 {
+ compatible = "renesas,r9a08g046-ssi", "renesas,rz-ssi";
+ reg = <0 0x100e4000 0 0x400>;
+ interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 307 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "int_req", "dma_rx", "dma_tx";
+ clocks = <&cpg CPG_MOD R9A08G046_SSI0_PCLK2>,
+ <&cpg CPG_MOD R9A08G046_SSI0_PCLK_SFR>,
+ <&audio_clk1>, <&audio_clk2>;
+ clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
+ resets = <&cpg R9A08G046_SSI0_RST_M2_REG>;
+ dmas = <&dmac 0x2665>, <&dmac 0x2666>;
+ dma-names = "tx", "rx";
+ power-domains = <&cpg>;
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
+ ssi1: ssi@100e4400 {
+ compatible = "renesas,r9a08g046-ssi", "renesas,rz-ssi";
+ reg = <0 0x100e4400 0 0x400>;
+ interrupts = <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 309 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 310 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "int_req", "dma_rx", "dma_tx";
+ clocks = <&cpg CPG_MOD R9A08G046_SSI1_PCLK2>,
+ <&cpg CPG_MOD R9A08G046_SSI1_PCLK_SFR>,
+ <&audio_clk1>, <&audio_clk2>;
+ clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
+ resets = <&cpg R9A08G046_SSI1_RST_M2_REG>;
+ dmas = <&dmac 0x2669>, <&dmac 0x266a>;
+ dma-names = "tx", "rx";
+ power-domains = <&cpg>;
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
+ ssi2: ssi@100e4800 {
+ compatible = "renesas,r9a08g046-ssi", "renesas,rz-ssi";
+ reg = <0 0x100e4800 0 0x400>;
+ interrupts = <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 312 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 313 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "int_req", "dma_rx", "dma_tx";
+ clocks = <&cpg CPG_MOD R9A08G046_SSI2_PCLK2>,
+ <&cpg CPG_MOD R9A08G046_SSI2_PCLK_SFR>,
+ <&audio_clk1>, <&audio_clk2>;
+ clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
+ resets = <&cpg R9A08G046_SSI2_RST_M2_REG>;
+ dmas = <&dmac 0x266d>, <&dmac 0x266e>;
+ dma-names = "tx", "rx";
+ power-domains = <&cpg>;
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
+ ssi3: ssi@100e4c00 {
+ compatible = "renesas,r9a08g046-ssi", "renesas,rz-ssi";
+ reg = <0 0x100e4c00 0 0x400>;
+ interrupts = <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 316 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "int_req", "dma_rx", "dma_tx";
+ clocks = <&cpg CPG_MOD R9A08G046_SSI3_PCLK2>,
+ <&cpg CPG_MOD R9A08G046_SSI3_PCLK_SFR>,
+ <&audio_clk1>, <&audio_clk2>;
+ clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
+ resets = <&cpg R9A08G046_SSI3_RST_M2_REG>;
+ dmas = <&dmac 0x2671>, <&dmac 0x2672>;
+ dma-names = "tx", "rx";
+ power-domains = <&cpg>;
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
cpg: clock-controller@11010000 {
compatible = "renesas,r9a08g046-cpg";
reg = <0 0x11010000 0 0x10000>;