diff options
6 files changed, 262 insertions, 0 deletions
diff --git a/queue-5.15/drm-amd-display-add-null-pointer-check-for-get_first_active_display.patch b/queue-5.15/drm-amd-display-add-null-pointer-check-for-get_first_active_display.patch new file mode 100644 index 0000000000..b353ee2197 --- /dev/null +++ b/queue-5.15/drm-amd-display-add-null-pointer-check-for-get_first_active_display.patch @@ -0,0 +1,40 @@ +From c3e9826a22027a21d998d3e64882fa377b613006 Mon Sep 17 00:00:00 2001 +From: Wentao Liang <vulab@iscas.ac.cn> +Date: Mon, 26 May 2025 10:37:31 +0800 +Subject: drm/amd/display: Add null pointer check for get_first_active_display() + +From: Wentao Liang <vulab@iscas.ac.cn> + +commit c3e9826a22027a21d998d3e64882fa377b613006 upstream. + +The function mod_hdcp_hdcp1_enable_encryption() calls the function +get_first_active_display(), but does not check its return value. +The return value is a null pointer if the display list is empty. +This will lead to a null pointer dereference in +mod_hdcp_hdcp2_enable_encryption(). + +Add a null pointer check for get_first_active_display() and return +MOD_HDCP_STATUS_DISPLAY_NOT_FOUND if the function return null. + +Fixes: 2deade5ede56 ("drm/amd/display: Remove hdcp display state with mst fix") +Signed-off-by: Wentao Liang <vulab@iscas.ac.cn> +Reviewed-by: Alex Hung <alex.hung@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +Cc: stable@vger.kernel.org # v5.8 +Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +--- + drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c ++++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp_psp.c +@@ -364,6 +364,9 @@ enum mod_hdcp_status mod_hdcp_hdcp1_enab + struct mod_hdcp_display *display = get_first_active_display(hdcp); + enum mod_hdcp_status status = MOD_HDCP_STATUS_SUCCESS; + ++ if (!display) ++ return MOD_HDCP_STATUS_DISPLAY_NOT_FOUND; ++ + mutex_lock(&psp->hdcp_context.mutex); + hdcp_cmd = (struct ta_hdcp_shared_memory *)psp->hdcp_context.context.mem_context.shared_buf; + memset(hdcp_cmd, 0, sizeof(struct ta_hdcp_shared_memory)); diff --git a/queue-5.15/drm-bridge-cdns-dsi-check-return-value-when-getting-default-phy-config.patch b/queue-5.15/drm-bridge-cdns-dsi-check-return-value-when-getting-default-phy-config.patch new file mode 100644 index 0000000000..640dccba10 --- /dev/null +++ b/queue-5.15/drm-bridge-cdns-dsi-check-return-value-when-getting-default-phy-config.patch @@ -0,0 +1,43 @@ +From c6a7ef0d4856b9629df390e9935d7fd67fe39f81 Mon Sep 17 00:00:00 2001 +From: Aradhya Bhatia <a-bhatia1@ti.com> +Date: Sat, 29 Mar 2025 17:09:15 +0530 +Subject: drm/bridge: cdns-dsi: Check return value when getting default PHY config + +From: Aradhya Bhatia <a-bhatia1@ti.com> + +commit c6a7ef0d4856b9629df390e9935d7fd67fe39f81 upstream. + +Check for the return value of the phy_mipi_dphy_get_default_config() +call, and in case of an error, return back the same. + +Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework") +Cc: stable@vger.kernel.org +Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> +Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Tested-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> +Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com> +Signed-off-by: Aradhya Bhatia <aradhya.bhatia@linux.dev> +Link: https://lore.kernel.org/r/20250329113925.68204-5-aradhya.bhatia@linux.dev +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> +Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +--- + drivers/gpu/drm/bridge/cdns-dsi.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/bridge/cdns-dsi.c ++++ b/drivers/gpu/drm/bridge/cdns-dsi.c +@@ -615,9 +615,11 @@ static int cdns_dsi_check_conf(struct cd + if (ret) + return ret; + +- phy_mipi_dphy_get_default_config(mode_clock * 1000, +- mipi_dsi_pixel_format_to_bpp(output->dev->format), +- nlanes, phy_cfg); ++ ret = phy_mipi_dphy_get_default_config(mode_clock * 1000, ++ mipi_dsi_pixel_format_to_bpp(output->dev->format), ++ nlanes, phy_cfg); ++ if (ret) ++ return ret; + + ret = cdns_dsi_adjust_phy_config(dsi, dsi_cfg, phy_cfg, mode, mode_valid_check); + if (ret) diff --git a/queue-5.15/drm-bridge-cdns-dsi-fix-connecting-to-next-bridge.patch b/queue-5.15/drm-bridge-cdns-dsi-fix-connecting-to-next-bridge.patch new file mode 100644 index 0000000000..63f4e4fc97 --- /dev/null +++ b/queue-5.15/drm-bridge-cdns-dsi-fix-connecting-to-next-bridge.patch @@ -0,0 +1,47 @@ +From 688eb4d465484bc2a3471a6a6f06f833b58c7867 Mon Sep 17 00:00:00 2001 +From: Aradhya Bhatia <a-bhatia1@ti.com> +Date: Sat, 29 Mar 2025 17:09:12 +0530 +Subject: drm/bridge: cdns-dsi: Fix connecting to next bridge + +From: Aradhya Bhatia <a-bhatia1@ti.com> + +commit 688eb4d465484bc2a3471a6a6f06f833b58c7867 upstream. + +Fix the OF node pointer passed to the of_drm_find_bridge() call to find +the next bridge in the display chain. + +The code to find the next panel (and create its panel-bridge) works +fine, but to find the next (non-panel) bridge does not. + +To find the next bridge in the pipeline, we need to pass "np" - the OF +node pointer of the next entity in the devicetree chain. Passing +"of_node" to of_drm_find_bridge (which is what the code does currently) +will fetch the bridge for the cdns-dsi which is not what's required. + +Fix that. + +Fixes: e19233955d9e ("drm/bridge: Add Cadence DSI driver") +Cc: stable@vger.kernel.org +Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> +Tested-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> +Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com> +Signed-off-by: Aradhya Bhatia <aradhya.bhatia@linux.dev> +Link: https://lore.kernel.org/r/20250329113925.68204-2-aradhya.bhatia@linux.dev +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> +Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +--- + drivers/gpu/drm/bridge/cdns-dsi.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/bridge/cdns-dsi.c ++++ b/drivers/gpu/drm/bridge/cdns-dsi.c +@@ -961,7 +961,7 @@ static int cdns_dsi_attach(struct mipi_d + bridge = drm_panel_bridge_add_typed(panel, + DRM_MODE_CONNECTOR_DSI); + } else { +- bridge = of_drm_find_bridge(dev->dev.of_node); ++ bridge = of_drm_find_bridge(np); + if (!bridge) + bridge = ERR_PTR(-EINVAL); + } diff --git a/queue-5.15/drm-bridge-cdns-dsi-fix-the-clock-variable-for-mode_valid.patch b/queue-5.15/drm-bridge-cdns-dsi-fix-the-clock-variable-for-mode_valid.patch new file mode 100644 index 0000000000..8220ad799f --- /dev/null +++ b/queue-5.15/drm-bridge-cdns-dsi-fix-the-clock-variable-for-mode_valid.patch @@ -0,0 +1,55 @@ +From 132bdcec399be6ae947582249a134b38cf56731c Mon Sep 17 00:00:00 2001 +From: Aradhya Bhatia <a-bhatia1@ti.com> +Date: Sat, 29 Mar 2025 17:09:14 +0530 +Subject: drm/bridge: cdns-dsi: Fix the clock variable for mode_valid() + +From: Aradhya Bhatia <a-bhatia1@ti.com> + +commit 132bdcec399be6ae947582249a134b38cf56731c upstream. + +The crtc_* mode parameters do not get generated (duplicated in this +case) from the regular parameters before the mode validation phase +begins. + +The rest of the code conditionally uses the crtc_* parameters only +during the bridge enable phase, but sticks to the regular parameters +for mode validation. In this singular instance, however, the driver +tries to use the crtc_clock parameter even during the mode validation, +causing the validation to fail. + +Allow the D-Phy config checks to use mode->clock instead of +mode->crtc_clock during mode_valid checks, like everywhere else in the +driver. + +Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework") +Cc: stable@vger.kernel.org +Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> +Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> +Tested-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> +Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com> +Signed-off-by: Aradhya Bhatia <aradhya.bhatia@linux.dev> +Link: https://lore.kernel.org/r/20250329113925.68204-4-aradhya.bhatia@linux.dev +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> +Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +--- + drivers/gpu/drm/bridge/cdns-dsi.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/bridge/cdns-dsi.c ++++ b/drivers/gpu/drm/bridge/cdns-dsi.c +@@ -608,13 +608,14 @@ static int cdns_dsi_check_conf(struct cd + struct phy_configure_opts_mipi_dphy *phy_cfg = &output->phy_opts.mipi_dphy; + unsigned long dsi_hss_hsa_hse_hbp; + unsigned int nlanes = output->dev->lanes; ++ int mode_clock = (mode_valid_check ? mode->clock : mode->crtc_clock); + int ret; + + ret = cdns_dsi_mode2cfg(dsi, mode, dsi_cfg, mode_valid_check); + if (ret) + return ret; + +- phy_mipi_dphy_get_default_config(mode->crtc_clock * 1000, ++ phy_mipi_dphy_get_default_config(mode_clock * 1000, + mipi_dsi_pixel_format_to_bpp(output->dev->format), + nlanes, phy_cfg); + diff --git a/queue-5.15/drm-bridge-cdns-dsi-wait-for-clk-and-data-lanes-to-be-ready.patch b/queue-5.15/drm-bridge-cdns-dsi-wait-for-clk-and-data-lanes-to-be-ready.patch new file mode 100644 index 0000000000..1cd6e1bcd0 --- /dev/null +++ b/queue-5.15/drm-bridge-cdns-dsi-wait-for-clk-and-data-lanes-to-be-ready.patch @@ -0,0 +1,72 @@ +From 47c03e6660e96cbba0239125b1d4a9db3c724b1d Mon Sep 17 00:00:00 2001 +From: Aradhya Bhatia <a-bhatia1@ti.com> +Date: Sat, 29 Mar 2025 17:09:16 +0530 +Subject: drm/bridge: cdns-dsi: Wait for Clk and Data Lanes to be ready + +From: Aradhya Bhatia <a-bhatia1@ti.com> + +commit 47c03e6660e96cbba0239125b1d4a9db3c724b1d upstream. + +Once the DSI Link and DSI Phy are initialized, the code needs to wait +for Clk and Data Lanes to be ready, before continuing configuration. +This is in accordance with the DSI Start-up procedure, found in the +Technical Reference Manual of Texas Instrument's J721E SoC[0] which +houses this DSI TX controller. + +If the previous bridge (or crtc/encoder) are configured pre-maturely, +the input signal FIFO gets corrupt. This introduces a color-shift on the +display. + +Allow the driver to wait for the clk and data lanes to get ready during +DSI enable. + +[0]: See section 12.6.5.7.3 "Start-up Procedure" in J721E SoC TRM + TRM Link: http://www.ti.com/lit/pdf/spruil1 + +Fixes: e19233955d9e ("drm/bridge: Add Cadence DSI driver") +Cc: stable@vger.kernel.org +Tested-by: Dominik Haller <d.haller@phytec.de> +Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> +Tested-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> +Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com> +Signed-off-by: Aradhya Bhatia <aradhya.bhatia@linux.dev> +Link: https://lore.kernel.org/r/20250329113925.68204-6-aradhya.bhatia@linux.dev +Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> +Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +--- + drivers/gpu/drm/bridge/cdns-dsi.c | 16 +++++++++++++++- + 1 file changed, 15 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/bridge/cdns-dsi.c ++++ b/drivers/gpu/drm/bridge/cdns-dsi.c +@@ -789,8 +789,9 @@ static void cdns_dsi_bridge_enable(struc + struct phy_configure_opts_mipi_dphy *phy_cfg = &output->phy_opts.mipi_dphy; + unsigned long tx_byte_period; + struct cdns_dsi_cfg dsi_cfg; +- u32 tmp, reg_wakeup, div; ++ u32 tmp, reg_wakeup, div, status; + int nlanes; ++ int i; + + if (WARN_ON(pm_runtime_get_sync(dsi->base.dev) < 0)) + return; +@@ -803,6 +804,19 @@ static void cdns_dsi_bridge_enable(struc + cdns_dsi_hs_init(dsi); + cdns_dsi_init_link(dsi); + ++ /* ++ * Now that the DSI Link and DSI Phy are initialized, ++ * wait for the CLK and Data Lanes to be ready. ++ */ ++ tmp = CLK_LANE_RDY; ++ for (i = 0; i < nlanes; i++) ++ tmp |= DATA_LANE_RDY(i); ++ ++ if (readl_poll_timeout(dsi->regs + MCTL_MAIN_STS, status, ++ (tmp == (status & tmp)), 100, 500000)) ++ dev_err(dsi->base.dev, ++ "Timed Out: DSI-DPhy Clock and Data Lanes not ready.\n"); ++ + writel(HBP_LEN(dsi_cfg.hbp) | HSA_LEN(dsi_cfg.hsa), + dsi->regs + VID_HSIZE1); + writel(HFP_LEN(dsi_cfg.hfp) | HACT_LEN(dsi_cfg.hact), diff --git a/queue-5.15/series b/queue-5.15/series index 4102d08a40..a52e1dafc9 100644 --- a/queue-5.15/series +++ b/queue-5.15/series @@ -82,3 +82,8 @@ drm-tegra-assign-plane-type-before-registration.patch drm-tegra-fix-a-possible-null-pointer-dereference.patch drm-udl-unregister-device-before-cleaning-up-on-disconnect.patch drm-amdkfd-fix-race-in-gws-queue-scheduling.patch +drm-bridge-cdns-dsi-fix-the-clock-variable-for-mode_valid.patch +drm-bridge-cdns-dsi-fix-connecting-to-next-bridge.patch +drm-bridge-cdns-dsi-check-return-value-when-getting-default-phy-config.patch +drm-bridge-cdns-dsi-wait-for-clk-and-data-lanes-to-be-ready.patch +drm-amd-display-add-null-pointer-check-for-get_first_active_display.patch |