diff options
Diffstat (limited to 'queue-6.12/spi-spi-mem-add-a-new-controller-capability.patch')
| -rw-r--r-- | queue-6.12/spi-spi-mem-add-a-new-controller-capability.patch | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/queue-6.12/spi-spi-mem-add-a-new-controller-capability.patch b/queue-6.12/spi-spi-mem-add-a-new-controller-capability.patch new file mode 100644 index 0000000000..bbbc1c1bdc --- /dev/null +++ b/queue-6.12/spi-spi-mem-add-a-new-controller-capability.patch @@ -0,0 +1,71 @@ +From 16d2efcbbac33cd7d1be2d934b9bfb3f24425544 Mon Sep 17 00:00:00 2001 +From: Sasha Levin <sashal@kernel.org> +Date: Tue, 24 Dec 2024 18:05:47 +0100 +Subject: spi: spi-mem: Add a new controller capability + +From: Miquel Raynal <miquel.raynal@bootlin.com> + +[ Upstream commit 1248c9b8d54120950fda10fbeb98fb8932b4d45c ] + +There are spi devices with multiple frequency limitations depending on +the invoked command. We probably do not want to afford running at the +lowest supported frequency all the time, so if we want to get the most +of our hardware, we need to allow per-operation frequency limitations. + +Among all the SPI memory controllers, I believe all are capable of +changing the spi frequency on the fly. Some of the drivers do not make +any frequency setup though. And some others will derive a per chip +prescaler value which will be used forever. + +Actually changing the frequency on the fly is something new in Linux, so +we need to carefully flag the drivers which do and do not support it. A +controller capability is created for that, and the presence for this +capability will always be checked before accepting such pattern. + +Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> +Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> +Link: https://patch.msgid.link/20241224-winbond-6-11-rc1-quad-support-v2-2-ad218dbc406f@bootlin.com +Signed-off-by: Mark Brown <broonie@kernel.org> +Signed-off-by: Sasha Levin <sashal@kernel.org> +--- + drivers/spi/spi-mem.c | 6 ++++++ + include/linux/spi/spi-mem.h | 2 ++ + 2 files changed, 8 insertions(+) + +diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c +index f8b598ba962d9..d0ae20d433d61 100644 +--- a/drivers/spi/spi-mem.c ++++ b/drivers/spi/spi-mem.c +@@ -188,6 +188,12 @@ bool spi_mem_default_supports_op(struct spi_mem *mem, + op->max_freq < mem->spi->controller->min_speed_hz) + return false; + ++ if (op->max_freq && ++ op->max_freq < mem->spi->max_speed_hz) { ++ if (!spi_mem_controller_is_capable(ctlr, per_op_freq)) ++ return false; ++ } ++ + return spi_mem_check_buswidth(mem, op); + } + EXPORT_SYMBOL_GPL(spi_mem_default_supports_op); +diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h +index 44b7ecee0e74c..0f00d74beb24c 100644 +--- a/include/linux/spi/spi-mem.h ++++ b/include/linux/spi/spi-mem.h +@@ -306,10 +306,12 @@ struct spi_controller_mem_ops { + * struct spi_controller_mem_caps - SPI memory controller capabilities + * @dtr: Supports DTR operations + * @ecc: Supports operations with error correction ++ * @per_op_freq: Supports per operation frequency switching + */ + struct spi_controller_mem_caps { + bool dtr; + bool ecc; ++ bool per_op_freq; + }; + + #define spi_mem_controller_is_capable(ctlr, cap) \ +-- +2.39.5 + |