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ci: add RVV CI using cloud-v runner#377

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ihb2032 wants to merge 11 commits into
alibaba:mainfrom
ihb2032:feat/rvv-ci
Open

ci: add RVV CI using cloud-v runner#377
ihb2032 wants to merge 11 commits into
alibaba:mainfrom
ihb2032:feat/rvv-ci

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@ihb2032

@ihb2032 ihb2032 commented Apr 29, 2026

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Description

Add RVV CI support using cloud-v runner to improve RISC-V vector instruction testing.

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@ihb2032 ihb2032 requested review from Cuiyus and iaojnh as code owners April 29, 2026 06:27
@ihb2032 ihb2032 removed their assignment Apr 29, 2026
@ihb2032 ihb2032 force-pushed the feat/rvv-ci branch 2 times, most recently from 05f4e4b to 3b93746 Compare June 2, 2026 08:22
ihb2032 added 8 commits June 3, 2026 10:21
Introduce the RISC-V CI runner provided by the RISE project.
This enables automated testing and building for the RISC-V architecture.

Signed-off-by: ihb2032 <hebome@foxmail.com>
Signed-off-by: ihb2032 <hebome@foxmail.com>
Signed-off-by: ihb2032 <hebome@foxmail.com>
Signed-off-by: ihb2032 <hebome@foxmail.com>
Signed-off-by: ihb2032 <hebome@foxmail.com>
Signed-off-by: ihb2032 <hebome@foxmail.com>
Signed-off-by: ihb2032 <hebome@foxmail.com>
Introduce the RISC-V CI runner provided by the RISE project.
This enables automated testing and building for the RISC-V architecture.

Signed-off-by: ihb2032 <hebome@foxmail.com>
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