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1. parthak314/RISCV-Team5 parthak314/RISCV-Team5 Public

   RISC-V 32I CPU designed as part of the instruction set architecture (ISA) module for 2nd year EIE at Imperial College London.

   C++ 4 1

2. qichao-arlo-wang/hlp-dsl-assembler-simulator qichao-arlo-wang/hlp-dsl-assembler-simulator Public

   F# 1

3. ruc_C_compiler ruc_C_compiler Public

   ANSI C90 to RISC-V compiler as part of Imperial College London's EIE Instruction Set Architecture and Compilers (Y2) coursework.

   C++

4. Circuit-Breakers-Smart-Grid-2025 Circuit-Breakers-Smart-Grid-2025 Public

   Smart grid energy management system as part of the Imperial EIE/EEE year 2 summer project. Frontend application, backend server, Raspberry Pi Pico SMPS firmware and ESP32 master-slave.

   Python