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1. SONY-Cell-SPU-Processor SONY-Cell-SPU-Processor Public

   This repository contains the complete Verilog implementation and supporting tools for a cycle-accurate, dual-issue pipelined multimedia processor inspired by the Synergistic Processing Unit (SPU) o…

   Verilog 23 1

2. Multicore-OoO-sim Multicore-OoO-sim Public

   Trace-driven multi-core out-of-order CPU simulator with L1/L2, ring NoC, and five cache-coherence protocols (MI / MSI / MESI / MOSI / MOESIF). ChampSim-compatible traces. C++20, CMake, Catch2.

   C++ 1

3. Posit-arithmetic-unit Posit-arithmetic-unit Public

   This repository provides a parameterized hardware implementation of a Posit Arithmetic Unit (PAU) written in Verilog. It supports addition, subtraction, multiplication, and division over configurab…

   Verilog 1

4. FPGA-Note-Tuner FPGA-Note-Tuner Public

   This project involves designing a guitar tuner using an Artix-7 FPGA from Xilinx. The tuner processes 24-bit, 48 kHz stereo audio input, performs Fast Fourier Transform (FFT) to analyze frequencies…

   VHDL 1

5. SIMD_Multimedia_Processing_Unit SIMD_Multimedia_Processing_Unit Public

   This project involves the design and implementation of a 4-stage pipelined multimedia processing unit using VHDL/Verilog hardware description languages.

   VHDL 2 1

6. PODEM_simulator PODEM_simulator Public

   C++ implementation of PODEM and deductive fault simulator for combinational circuit.

   C++