Skip to content
View jxwleong's full-sized avatar
:electron:
Looking for interesting project to work on. Feel free to email me 😊
:electron:
Looking for interesting project to work on. Feel free to email me 😊
  • ARM Ltd
  • Cambridge, United Kingdom
  • 13:41 (UTC)
  • in/jlxw

Block or report jxwleong

Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
jxwleong/README.md

Hi , I'm Jason

I'm a guy that enjoy developing software from Malaysia. 😊

πŸ™‹β€β™‚οΈ About Me

  • πŸ”­ I’m currently working as Applications Engineer at ARM

  • 🌱 I’m just graduated Master of Computer Science in Software Engineering at MMU

  • πŸ‘― I’m looking to collaborate on OpenSource Projects

  • πŸ“« How to reach me jason.xie.wei.leong@gmail.com

  • ⚑ Fun fact I'm an early bird and enjoy working outπŸ’ͺ


πŸ“Š My Github Stats

Jason Leong's streak


Jason Leong's Github Stats Jason Leong's Top Languages
Note: Top languages is only a metric of the languages my public code consists of and doesn't reflect experience or skill level.

Jason Leong's Activity Graph



Connect with me:



❀ Views and Followers

GitHub Badge

Pinned Loading

  1. iot-agriculturue-monitoring-system iot-agriculturue-monitoring-system Public

    An Arduino based IoT system that monitor soil moisture and temperature using WiFi with a automated irrigation system using relay switch.

    C++ 12 7

  2. jtag-boundary-scan jtag-boundary-scan Public

    Using JTAG on STM32F103C8T6 to get device ID(IDCODE) and utilize other JTAG instructions such as BYPASS, EXTEST, SAMPLE/PRELOAD. Tera Term is used with UART to have a command-line interface (CLI) t…

    C 43 9

  3. arduino-acs712 arduino-acs712 Public

    Arduino library for ACS712. Credit to the original author https://github.com/rkoptev/ACS712-arduino

    C++ 4

  4. altera-de1-processor altera-de1-processor Public

    Synthesize a general purpose microprocessor (GPM) using verilog hdl code on Altera DE1 development board. The processor was used to find the greatest common divisor (GCD) between two integers.

    Verilog 2 1

  5. altera-de1-traffic-light-controller altera-de1-traffic-light-controller Public

    Using finite state machine (FSM) approach to design a traffic light controller on Altera DE1 development board.

    Verilog 1 1

  6. shunting-yard shunting-yard Public

    Using shunting yard algorithm in c language to complete arithmetic operation.

    C