I’m Florian Zaruba — hardware/architecture person with a PhD from the Integrated Systems Laboratory at ETH Zurich, currently working at a deep-tech start-up in Zurich.
I’m passionate about the hardware / software boundary, from OS all the way down to the CPU. My daily work revolves around architecting and building high-performance RISC-V CPUs, but I love everything around that too: hardware tooling, compilers, operating systems, verification, and the occasional deep dive into “why is this bit slow?”.
Also: I’ve designed a lot of ASICs (from 65nm to 5nm)
- RISC-V CPU & SoC architectur
- High-performance microarchitecture
- Hardware/software co-design
- Open-source silicon & ecosystem building
- Compilers / OS / tooling that make hardware shine
- CVA6 / Ariane — Linux-booting, application-class 64-bit RISC-V core (principal author/architect).
- Snitch — a tiny but mighty high-performance RISC-V core/system for FP-heavy workloads.
- Manticore/Occamy — a many-core RISC-V chiplet architecture (4096 cores!) for ultra-efficient FP compute.
- RISC-V Debug Module, AXI infrastructure, common_cells, and other SoC essentials.