drivers: STM32 async flash erase and write by jpowen898 · Pull Request #93173 · zephyrproject-rtos/zephyr

jpowen898 · 2025-07-16T05:25:09Z

Implemented async flash erase and writes using the STM32 hal HAL_FLASHEx_Erase_IT() and HAL_FLASH_Program_IT() functions with their associated interrupt handler.
I only implemented this for the h7, l4, and f4 stm32 families because that is the hardware I had available to test on.
Async flash transactions can be enabled using the FLASH_STM32_ASYNC config option.
Async transactions are implemented using a semaphore which blocks while waiting for the flash IRQ to indicate the end of a flash transaction. This allows other threads to take action while flash erase and write actions are taking place.

github-actions · 2025-07-16T05:25:48Z

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drivers/flash/Kconfig

drivers/flash/flash_stm32.c

drivers/flash/flash_stm32f4x.c

jpowen898 · 2025-07-16T14:51:56Z

@nordicjm Thanks for the feedback. I made all the requested changes, let me know if there is anything else.

Addressed

drivers/flash/Kconfig.stm32

etienne-lms

Minor issues, otherwise LGTM.

drivers/flash/flash_stm32l4x.c

mathieuchopstm · 2025-11-17T16:06:16Z

drivers/flash/Kconfig.stm32

+	select USE_STM32_HAL_FLASH
+	select USE_STM32_HAL_FLASH_EX


Is the feature really that difficult to implement w/o the HAL?

I'm not exactly sure what you mean. But to explain this a little better, when you attempt to do a write/erase to internal flash on the stm32's the current implementation is full blocking meaning it has some while(1) loops which block all threads (not just the current thread) until the flash operation is complete. To erase a single flash sector (128KB) on the stm32h7 platform typically takes ~1.1 seconds, so all threads end up getting starved for that period of time which is too long for my application.

My fix for this is to use the stm hal to start the flash write/erase, then block with a semaphore (so not all threads get starved) and then the semaphore get's free-ed when a the STM flash hw interrupt gets called. So maybe calling this an ASYNC flash opperation is misleading. The flash_write() and flash_erase() functions still block for the same amount of time and complete the same tasks before returning as they did previously, only now they allow the schedule to run other tasks.

drivers/flash/flash_stm32f4x.c

mathieuchopstm · 2025-11-17T16:12:27Z

drivers/flash/Kconfig.stm32

+	  Use asynchronous flash operations to unblock other threads while
+	  flash is busy.


My understanding is that once this option is enabled, only asynchronous operations are enabled. This is a big change from the old behavior (e.g., not isr-ok) so it should be documented.

So yes when you enable this all operations are done in "asynchronous" mode, I am happy to document that if you would like, just point me to the correct spot to do that. But to be clear the flash_erase() and flash_write() functions complete the same high level tasks as they did before and return in the same amount of time so it should be pretty transperent to the user of the function if it is in async mode or not. Also those functions were never ISR safe because flash_erase() takes ~1.1s to return (longer if you erase multiple sectors at a time) and flash_write() takes ~3.5ms to return (depending on how much you are writting at a time).

I am happy to document that if you would like, just point me to the correct spot to do that.

In the Kconfig help text itself

Also those functions were never ISR safe because flash_erase() takes ~1.1s to return (longer if you erase multiple sectors at a time) and flash_write() takes ~3.5ms to return (depending on how much you are writting at a time).

isr-ok-ness is unrelated to how long a function may take to execute (otherwise the ENTROPY_BUSYWAIT flag would not exist)

Added optional use of the stm32 hal async flash write and erase capabilities on the l4, f4, and h7 soc families. It is implemented using semaphores to allow for other threads to take action during the erase/write actions. This feature is disabled by default and can be optionally enabled using the FLASH_STM32_ASYNC config option. Signed-off-by: Parker Owen <jpowen898@gmail.com>

sonarqubecloud · 2025-11-17T23:40:09Z

Quality Gate passed

Issues
5 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
20.7% Duplication on New Code

See analysis details on SonarQube Cloud

etienne-lms

Commit message says

This feature is disabled by default and
can be optionally enabled using the FLASH_STM32_ASYNC config option

Actually the feature is default enabled for drivers that support async operations.
(edited) my mistake, see my comment below.

Worth to mention also that when enabled, read operations are synced on flash erase/write semaphore.

~~When so, read operations are se~~

etienne-lms · 2025-11-18T10:12:20Z

doc/releases/release-notes-4.4.rst


  * :dtcompatible:`jedec,mspi-nor` now allows MSPI configuration of read, write and
    control commands separately via devicetree.
+  * :kconfig:option:`CONFIG_FLASH_STM32_ASYNC`


Maybe a place to address #93173 (comment). E.g.:

* :kconfig:option:`CONFIG_FLASH_STM32_ASYNC`. It is default enabled (when multithreading is enable) for STM32 flash drivers that support asynchronous operations.

etienne-lms · 2025-11-18T10:17:04Z

drivers/flash/flash_stm32h7x.c

+	for (size_t i = 0; i < n; i += FLASH_NB_32BITWORD_IN_FLASHWORD) {
+		FLASH_STM32_PRIV(dev)->async_complete = false;
+		FLASH_STM32_PRIV(dev)->async_error = false;
+		uint32_t wordAddr = (uint32_t)&data[i];


Add an empty line above local variable definition + use a snake_case label.

uint32_t word_addr = (uint32_t)&data[i];

etienne-lms · 2025-11-18T10:59:00Z

Commit message says

This feature is disabled by default and
can be optionally enabled using the FLASH_STM32_ASYNC config option

Actually the feature is default enabled for drivers that support async operations.

My mistake, it is default disabled. Discard this comment. Sorry.

erwango · 2025-11-18T10:59:32Z

drivers/flash/flash_stm32.c

+	flash_dev = FLASH_STM32_PRIV(dev);
+	flash_stm32_async_sem_init(dev);
+	IRQ_CONNECT(FLASH_IRQn, 0, flash_stm32_irq_handler, NULL, 0);
+	irq_enable(FLASH_IRQn);


Please get flash IRQ from device tree.

etienne-lms · 2025-11-18T11:11:54Z

drivers/flash/flash_stm32f4x.c

+		return = 0;
+	} else if (FLASH_STM32_PRIV(dev)->async_error) {
+		LOG_ERR("Flash erase failed at 0x%x", FLASH_STM32_PRIV(dev)->async_ret);
+		return = -EIO;


Suggested change

return = -EIO;

return -EIO;

Ditto above.

erwango · 2025-11-18T11:13:34Z

drivers/flash/flash_stm32f4x.c

+	FLASH_STM32_PRIV(dev)->async_error = false;
+
+	HAL_FLASH_Program_IT(FLASH_TYPEPROGRAM_SIZE, offset + FLASH_STM32_BASE_ADDRESS, val);
+	k_sem_take(&FLASH_STM32_PRIV(dev)->async_sem, K_FOREVER);


You provided a function for flash_stm32_async_sem_init, which is matching flash_stm32_sem_init implementation.
It would be nice to make it complete and consistent and provide matching flash_stm32_async_sem_take and flash_stm32_async_sem_give.

etienne-lms · 2025-11-19T17:07:24Z

drivers/flash/flash_stm32.c

 	LOG_DBG("Read offset: %ld, len: %zu", (long int) offset, len);

+	if (IS_ENABLED(CONFIG_FLASH_STM32_ASYNC)) {
+		flash_stm32_sem_take(dev);


Could you tell in the commit message why read operations need to take the semaphore when using the flash programming interrupt.

nordicjm · 2025-12-22T14:57:06Z

Since this also changes flash API, have added @de-nordic as co-assignee

sonarqubecloud · 2025-12-22T15:27:15Z

Quality Gate passed

Issues
1 New issue
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
20.7% Duplication on New Code

See analysis details on SonarQube Cloud

github-actions · 2026-02-21T00:49:26Z

This pull request has been marked as stale because it has been open (more than) 60 days with no activity. Remove the stale label or add a comment saying that you would like to have the label removed otherwise this pull request will automatically be closed in 14 days. Note, that you can always re-open a closed pull request at any time.

github-actions bot added area: Flash platform: STM32 ST Micro STM32 labels Jul 16, 2025

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drivers: STM32 async flash erase and write#93173

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