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drivers: sdhc: litex: add support for litesdcard #93816

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drivers: sdhc: litex: add support for litesdcard #93816

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85dd476
drivers: sdhc: litex: add litesdcard driver
maass-hamburg Oct 16, 2025
0d8b8ae
boards: litex: litex_vexriscv: add litesdcard
maass-hamburg Oct 16, 2025
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3 changes: 3 additions & 0 deletions boards/enjoydigital/litex_vexriscv/Kconfig.defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -6,4 +6,7 @@ if BOARD_LITEX_VEXRISCV
configdefault NET_L2_ETHERNET
default y

configdefault SDHC_LITEX_LITESDCARD_NO_COHERENT_DMA
default y

endif # BOARD_LITEX_VEXRISCV
74 changes: 74 additions & 0 deletions boards/enjoydigital/litex_vexriscv/litex_vexriscv.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -21,6 +21,7 @@
};

aliases {
sdhc0 = &sdhc0;
watchdog0 = &wdt0;
};

Expand Down Expand Up @@ -235,6 +236,79 @@
};
};

sdhc0: sdhc@e000e800 {
compatible = "litex,mmc";
interrupt-parent = <&intc0>;
reg = <0xe000e800 0x4>,
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@danieldegrasse danieldegrasse Nov 14, 2025

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Wondering if we can use one base address here. Or are all these register offsets configurable in the RTL?
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@maass-hamburg maass-hamburg Nov 18, 2025

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no see other answer
<0xe000e804 0x4>,
<0xe000e808 0x4>,
<0xe000e80c 0x4>,
<0xe000e810 0x4>,
<0xe000e814 0x4>,
<0xe000e818 0x4>,
<0xe000e81c 0x4>,
<0xe000e820 0x4>,
<0xe000e824 0x4>,
<0xe000e828 0x10>,
<0xe000e838 0x4>,
<0xe000e83c 0x4>,
<0xe000e840 0x4>,
<0xe000e844 0x4>,
<0xe000e848 0x8>,
<0xe000e850 0x4>,
<0xe000e854 0x4>,
<0xe000e858 0x4>,
<0xe000e85c 0x4>,
<0xe000e860 0x4>,
<0xe000e864 0x8>,
<0xe000e86c 0x4>,
<0xe000e870 0x4>,
<0xe000e874 0x4>,
<0xe000e878 0x4>,
<0xe000e87c 0x4>,
<0xe000e880 0x4>,
<0xe000e884 0x4>,
<0xe000e888 0x4>;
reg-names = "phy_card_detect",
"phy_clocker_divider",
"phy_init_initialize",
"phy_cmdr_timeout",
"phy_dataw_status",
"phy_datar_timeout",
"phy_settings",
"core_cmd_argument",
"core_cmd_command",
"core_cmd_send",
"core_cmd_response",
"core_cmd_event",
"core_data_event",
"core_block_length",
"core_block_count",
"block2mem_dma_base",
"block2mem_dma_length",
"block2mem_dma_enable",
"block2mem_dma_done",
"block2mem_dma_loop",
"block2mem_dma_offset",
"mem2block_dma_base",
"mem2block_dma_length",
"mem2block_dma_enable",
"mem2block_dma_done",
"mem2block_dma_loop",
"mem2block_dma_offset",
"ev_status",
"ev_pending",
"ev_enable";
interrupts = <5 1>;
status = "okay";

mmc {
compatible = "zephyr,sdmmc-disk";
status = "okay";
disk-name = "SD";
};
};

prbs0: prbs@e0006800 {
compatible = "litex,prbs";
reg = <0xe0006800 0x4>;
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1 change: 1 addition & 0 deletions boards/enjoydigital/litex_vexriscv/litex_vexriscv.yaml
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Expand Up @@ -15,6 +15,7 @@ supported:
- gpio
- uart
- spi
- sdhc
- i2s
- i2c
- netif:eth
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1 change: 1 addition & 0 deletions drivers/sdhc/CMakeLists.txt
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Expand Up @@ -15,6 +15,7 @@ zephyr_library_sources_ifdef(CONFIG_SAM_SDMMC sam_sdmmc.c)
zephyr_library_sources_ifdef(CONFIG_SDHC_AMBIQ sdhc_ambiq.c)
zephyr_library_sources_ifdef(CONFIG_SDHC_ESP32 sdhc_esp32.c)
zephyr_library_sources_ifdef(CONFIG_SDHC_INFINEON_CAT1_PDL sdhc_infineon.c)
zephyr_library_sources_ifdef(CONFIG_SDHC_LITEX_LITESDCARD sdhc_litex_litesdcard.c)
zephyr_library_sources_ifdef(CONFIG_SDHC_MAX32 sdhc_max32.c)
zephyr_library_sources_ifdef(CONFIG_SDHC_RENESAS_RA sdhc_renesas_ra.c)
zephyr_library_sources_ifdef(CONFIG_SDHC_STM32_SDIO sdhc_stm32.c)
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1 change: 1 addition & 0 deletions drivers/sdhc/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,7 @@ source "drivers/sdhc/Kconfig.esp32"
source "drivers/sdhc/Kconfig.imx"
source "drivers/sdhc/Kconfig.infineon"
source "drivers/sdhc/Kconfig.intel"
source "drivers/sdhc/Kconfig.litex"
source "drivers/sdhc/Kconfig.max32"
source "drivers/sdhc/Kconfig.mcux_sdif"
source "drivers/sdhc/Kconfig.rcar"
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27 changes: 27 additions & 0 deletions drivers/sdhc/Kconfig.litex
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Original file line number Diff line number Diff line change
@@ -0,0 +1,27 @@
# SPDX-FileCopyrightText: Copyright The Zephyr Project Contributors
# SPDX-License-Identifier: Apache-2.0

config SDHC_LITEX_LITESDCARD
bool "LiteX LiteSDCard SDHC driver"
default y
depends on DT_HAS_LITEX_MMC_ENABLED
select SDHC_SUPPORTS_NATIVE_MODE
select EVENTS
help
sdhc driver for LiteX LiteSDCard.

if SDHC_LITEX_LITESDCARD

configdefault SDHC_BUFFER_ALIGNMENT
default 4

config SDHC_LITEX_LITESDCARD_NO_COHERENT_DMA
bool "No coherent DMA bus, need cache management"
select CACHE_MANAGEMENT
depends on DCACHE
help
This needs to be enabled if the LiteSDCard Module is not connected
to a coherent DMA bus, meaning that the cache needs to be managed
before and after DMA operations.

endif # SDHC_LITEX_LITESDCARD
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